Discrete Delay Express VI
Owning Palette: Discrete Linear Systems VIs
Installed With: FPGA Module
Delays the input value for the number of loop iterations you specify in the Configure Discrete Delay dialog box.
| Dialog Box Options |
| Block Diagram Inputs |
| Block Diagram Outputs |
Dialog Box Options
| Parameter | Description |
|---|---|
| Iterations | Specifies the number of loop iterations the Discrete Delay Express VI delays the input value. |
Block Diagram Inputs
| Parameter | Description |
|---|---|
| initialize | Causes LabVIEW to return initial condition as the output. The VI initializes automatically when it first runs. |
| initial condition | Inputs the data point the VI returns when first called or when initialize is TRUE. The VI returns initial condition every call after initialization until the loop iterations meet the specified delay. |
| input | Inputs the data point the VI processes. |
Block Diagram Outputs
| Parameter | Description |
|---|---|
| output | Returns the delayed input value. output[n] = input[n – k] where output[n] is the value of output on the nth call to the VI after initialization, output[0] through output[k – 1] = initial condition, and k is the delay you specify in the Configure Discrete Delay dialog box. |