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Owning Palette: Nonlinear Systems VIs

Installed With: FPGA Module

Implements a discontinuity at zero with linear behavior elsewhere. The data type you wire to input determines the output data type.

The maximum input word length is 32 bits.

Details  

	input is the data point the VI processes.
	gain is the gain to apply to input. The gain input must not exceed that of a fixed-point <±,16,8> type. Extra fractional bits are coerced to 8 fractional bits at the VI boundary using round-to-nearest-even mode.
	offset is an integer added to input * gain to determine the value of output. The VI only applies offset when input does not equal zero.
	output is the processed data. output = input * gain + offset for input > 0 output = input * gain – offset for input < 0 output = 0 for input = 0

Friction Details

If the result exceeds the output data type, the result saturates, returning the maximum value representable by the data type with the same sign as the actual result.

The VI truncates the multiplication result before adding the offset.