Trigger VI

LabVIEW 8.6 FPGA Module Help
June 2008

NI Part Number:
371599D-01

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Owning Palette: Nonlinear Systems VIs

Installed With: FPGA Module

Detects changes of the input signal during a control or simulation process. The data type you wire to trigger signal determines the triggered data type.

The maximum input word length is 32 bits.

	reset, when TRUE, sets triggered to FALSE and stores the current trigger signal.
	trigger signal is the input signal the VI monitors.
	trigger type determines which changes to trigger signal set triggered to TRUE. You can choose one of the following settings: rising, falling, or either.
	triggered is TRUE when the last two trigger signal points meet the conditions described by trigger type.

Trigger VI

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