FPGA Interface
Using LabVIEW FPGA Interface without the FPGA Module
Communicating with FPGA VIs
Opening a Reference to an FPGA VI
Communicating with an FPGA VI Running on a Development Computer
Using Multiple FPGA VI References for the Same Target
Reading FPGA VI Indicators
Writing to FPGA VI Controls
Reading DMA FIFOs from Host VIs
Writing to DMA FIFOs from Host VIs
Using SubVIs in Host VIs
Synchronizing FPGA VIs and Host VIs Using Interrupts
Downloading an FPGA VI to an FPGA Target
Stopping, Aborting, and Resetting FPGA VIs
FPGA Interface VIs and Functions
Close FPGA VI Reference
Invoke Method
Abort
Acknowledge IRQ
Download
FIFO.Configure
FIFO.Read
FIFO.Start
FIFO.Stop
FIFO.Write
Get FPGA VI Execution Mode
Reset
Run
Wait on IRQ
Open FPGA VI Reference
Read/Write Control
Scaling VIs
Butterworth Coefficients
FFT to Spectrum
Normalize Signal Generation Parameters
Notch Coefficients
Sample Rate To Loop Time
Scale Period
FPGA Interface Dialog Boxes
Configure FPGA VI Reference Dialog Box
Configure FPGA VI Reference Interface Dialog Box
Configure Open FPGA VI Reference Dialog Box
Select VI Dialog Box