Owning Palette: FPGA Math & Analysis VIs and Functions
Requires: FPGA ModuleComputes the Fast Fourier Transform (FFT) point by point. Use this Express VI after you use the Scaled Window Express VI to minimize spectral leakage associated with truncated waveforms. Use the FFT to Spectrum VI to convert the output of the FFT Express VI to an amplitude or power spectrum.
|Dialog Box Options|
|Block Diagram Inputs|
|Block Diagram Outputs|
|Transform Parameters||Contains the following options:|
|Output Data Type||Contains the following options:|
|Execution Mode||Contains the following options:|
|reset||Clears all internal states on the cycle or call for which this signal is TRUE. Outside the single-cycle Timed Loop, the Express VI restarts on the same call that reset is TRUE. Inside the single-cycle Timed Loop, the Express VI restarts on the first call that reset is deasserted after reset is TRUE. Additionally, the handshaking signals behave as follows during the cycles where reset is asserted:
|real data in||Specifies the real part of the input signal.|
|imaginary data in||Specifies the imaginary part of the input signal. Leave this terminal unwired to read only real data.|
|input valid||Specifies whether the next data point has arrived for processing. Wire the output valid output of an upstream node to this input to transfer data from the upstream node to this node.To display this handshaking terminal, select the Inside single-cycle Timed Loop option in the configuration dialog box.|
|ready for output||Specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the ready for input output of a downstream node to this input of the current node. |
|data index||Indicates which FFT bin the VI is outputting.|
|real data out||Returns the real part of the FFT result.|
|imaginary data out||Returns the imaginary part of the FFT result.|
|output valid||Returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the input valid input of a downstream node to transfer data from the node to the downstream node.|
|ready for input||Returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the ready for output input of an upstream node. |
The following diagram demonstrates timing when you use this Express VI outside of a single-cycle Timed Loop.
The following diagram demonstrates timing when you use this Express VI inside a single-cycle Timed Loop with Throughput equal to 1.
The following diagram demonstrates timing when you use this Express VI inside a single-cycle Timed Loop with Throughput not equal to 1.
In a single-cycle Timed Loop, the FFT Express VI does not accept or return values while computing the FFT. During this time, if the system or another node sends data to this Express VI, LabVIEW discards the data. This might happen if the FFT Express VI receives data as part of a complicated, or non-uniform, pattern.
To ensure no data is lost, create a FIFO to hold data until this Express VI accepts values again. Ensure that the FIFO you create is large enough to hold all data points that collect during the FFT calculation time. To roughly estimate the size of the FIFO you need to create, divide the latency of the FFT Express VI by the average system throughput.