Control VIs

LabVIEW 2011 FPGA Module Help

Edition Date: June 2011

Part Number: 371599G-01

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Owning Palette: FPGA Math & Analysis VIs and Functions

Requires: FPGA Module. This topic might not match its corresponding palette in LabVIEW depending on your operating system, licensed product(s), and target.

Use the Control VIs in FPGA VIs to create control applications for FPGA targets.

Note This palette is specific to FPGA targets.

Palette Object	Description
Matrix*Vector	Multiplies Matrix A by an input Vector b. This operation is useful for FPGA control applications, such as state-feedback control. You can use more than one multiplier to reduce the latency of this operation. To define Matrix A, double-click this Express VI and use the Matrix Data Initialization page to specify a VI, TXT, or CSV file that contains the matrix data. If you do not define Matrix A, this Express VI uses a matrix of zeroes instead.
PID (FPGA)	Implements a fixed-point PID algorithm for PID applications with high-speed control and/or high channel count on an FPGA target. You can use this Express VI with single-channel or multi-channel configurations. The PID algorithm features control action range and uses an integrator anti-windup calculation to limit the effect of the integral action during transients. The PID algorithm also features bumpless controller output for PID gain changes.

Palette Object

Description

Matrix*Vector

Multiplies Matrix A by an input Vector b. This operation is useful for FPGA control applications, such as state-feedback control. You can use more than one multiplier to reduce the latency of this operation.

To define Matrix A, double-click this Express VI and use the Matrix Data Initialization page to specify a VI, TXT, or CSV file that contains the matrix data. If you do not define Matrix A, this Express VI uses a matrix of zeroes instead.

PID (FPGA)

Implements a fixed-point PID algorithm for PID applications with high-speed control and/or high channel count on an FPGA target. You can use this Express VI with single-channel or multi-channel configurations. The PID algorithm features control action range and uses an integrator anti-windup calculation to limit the effect of the integral action during transients. The PID algorithm also features bumpless controller output for PID gain changes.

Subpalette	Description
Discrete Linear Systems VIs	Use the Discrete Linear Systems VIs to control or model discrete linear systems on FPGA targets.
Nonlinear Systems VIs	Use the Nonlinear Systems VIs to model nonlinear systems on FPGA targets.