Generation VIs
Owning Palette: FPGA Math & Analysis VIs and Functions
Requires: FPGA Module. This topic might not match its corresponding palette in LabVIEW depending on your operating system, licensed product(s), and target.
Use the Generation VIs in FPGA VIs to generate signals.
 | Note This palette is specific to FPGA targets. |
| Palette Object | Description |
|---|---|
| Sine Wave Generator | Generates a point-by-point sine wave using direct digital synthesis. The synthesis runs continuously from the top-level FPGA target clock to produce an accurate real-time frequency. Each execution of this VI returns the most recent sample produced by the underlying synthesis engine. |
| Square Wave Generator | Generates a point-by-point square wave using direct digital synthesis (DDS). The synthesis runs continuously using the block diagram clock rate to produce a real-time frequency. The block diagram clock rate is the top-level clock rate, unless the Square Wave Generator Express VI is inside a single-cycle Timed Loop configured with a different clock rate. |
| White Noise Generator | Generates a white noise signal with uniform or Gaussian distribution. |