You can perform integer math on the FPGA by using the Numeric functions.
When you perform integer math, the results can overflow. Integer overflow occurs when the result of a mathematical operation exceeds the range of the output data type. For example, the range of a U8 integer is 0 to 255. Adding two U8 integers together that have a result greater than 255 results in overflow, such as 200 + 70. When overflow occurs, the result rolls over, or wraps, at the limit of the range and the result modulo 256 is returned. For example, a result of 270 for a U8 integer wraps at 256 and returns 14.
You can take advantage of the rollover behavior that occurs with overflow in some applications. For example, the execution time measurement example relies on the rollover behavior of overflow for proper operation. The example configures the Tick Count Express VIs with an 8-bit Size of Internal Counter and milliseconds for Counter Units. When the internal counter of the Tick Count Express VI reaches 255 ms, it rolls over to 0. If the first Tick Count Express VI returns a Tick Count of 132 ms and the execution time of the LabVIEW code to be measured takes 140 ms, the internal counter has rolled over and the second Tick Count Express VI returns a Tick Count value of 16 ms. When the block diagram subtracts 132 from 16, overflow occurs and results in the value of 140.
|Note The Tick Count Express VI takes a single cycle to execute. In this example, if you set Counter Units as Ticks instead of mSec, the returned result from the subtraction is 141 even though the LabVIEW code in the middle sequence takes only 140 ticks to execute.|
Use the following techniques to avoid integer overflow: