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Using the Single-Precision Floating-Point Data Type (FPGA Module)

LabVIEW 2013 FPGA Module Help

Edition Date: June 2013

Part Number: 371599J-01

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The single-precision floating-point (SGL) data type provides more accuracy than a 24-bit fixed-point data type but reduces overall performance due to the increased latency of functions and the large number of FPGA resources that it uses. Evaluate your usage of numeric data types to determine which data type best suits your design.

The following list describes behavior to consider when developing FPGA applications with the single-precision floating-point data type:

  • The FPGA Module does not support the double-precision or extended-precision floating-point data types.
  • All FPGA targets support the SGL data type.
  • Only certain functions support the SGL data type.
  • The High Throughput Math functions do not support the SGL data type.
  • Most functions can perform single-precision floating-point operations only outside the single-cycle Timed Loop because they take more than one clock cycle to execute but do not have handshaking signals.
  • Data type coercions in FPGA VIs can consume a significant amount of logic resources, especially when a terminal is coerced to the SGL data type.
  • The FPGA Module does not support coercion to the SGL data type in the single-cycle Timed Loop.
  • In the FPGA Module, the SGL data type is compliant with IEEE Std 754-2008, with the exception that it does not support subnormal numbers. For example, if you use the Equal? function to compare bit accuracy between the host and target, the function returns a FALSE result when the operation encounters a very small number. Such errors also may propagate in a feedback loop and reduce data precision.
  • The bit pattern of NaN outputs on the FPGA may differ from NaN outputs on the development computer.

Single-Precision Floating-Point Operations inside the Single-Cycle Timed Loop

Most functions cannot perform single-precision floating-point operations inside a single-cycle Timed Loop because they require more than one clock cycle to execute but they do not have handshaking signals. The following features are supported inside the single-cycle Timed Loop with single-precision floating-point data:

  • IP Integration Node
  • Xilinx CORE Generator IP
  • Memory items
  • FIFOs
  • Registers
  • Local and global variables
  • Not A Number/Path/Refnum? Function
  • Select Function

Refer to the FPGA VI below for an example of how to pass single-precision floating-point data to a single-cycle Timed Loop using FIFOs.

The top loop shows data passing through the Square and Add functions outside the single-cycle Timed Loop. The intermediate result is then passed into the single-cycle Timed Loop through a FIFO Method Node to calculate the square root of the data. Finally a DMA FIFO passes the result back to the host computer.

Designing FPGA Applications with the Single-Precision Floating-Point Data Type

Consider the following uses when designing FPGA applications using single-precision floating-point operations.

Free the Host Processor to Perform Other Operations and Use Single-Precision Floating-Point Conversions with I/O

Performing I/O conversion to the FPGA frees processing on the host computer, especially in real-time systems. If you have FPGA resources available, perform fixed-point I/O to single-precision floating-point data conversions on the FPGA to free the host processor to perform other operations, such as meeting real-time requirements.

Operate on Data from Multiple Inputs or Outputs

Convert heterogeneous data paths into the SGL data type in order to handle them with common code. This conversion is useful in situations where you want to operate on data from multiple inputs that return different fixed-point data types.

The following FPGA VI shows an NI cRIO-9104 as it acquires data from two modules, converts to the SGL data type, and writes the data to a DMA FIFO.

Related Information

Deciding Which Data Type to Use in FPGA Designs (FPGA Module)

Functions that Support the Single-Precision Floating-Point Data Type in FPGA VIs (FPGA Module)


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