Owning Palette: FPGA Interface VIs and Functions
Requires: FPGA Interface
|FPGA VI Reference In is a reference to an FPGA VI. You must open a reference to the FPGA VI to use this parameter.|
|error in describes error conditions that occur before this node runs. This input provides standard error in functionality.|
|FPGA VI Reference Out returns a reference to an FPGA VI.|
|error out contains error information. This output provides standard error out functionality.|
A host VI can control and monitor data passed through the FPGA VI front panel. You cannot access values on any wires on the FPGA VI block diagram that do not have controls or indicators unless the data is stored in a DMA FIFO.
First open a reference to the FPGA target. Then wire the FPGA VI Reference Out output of the Open FPGA VI Reference function or the Bitfile reference out output of the Open Dynamic Bitfile Reference function to the Read/Write Control function to access controls and indicators on the FPGA VI. You can read indicators and write controls. You also can write indicators and read controls. You can expand the Read/Write Control function to read or write multiple controls and indicators. When you run the host VI, the Read/Write Control function reads and writes controls and indicators in the order they appear in the Read/Write Control function on the block diagram.
|Tip The Read/Write Control function supports scalar data, such as numeric and Boolean controls, and complex data, such as arrays and clusters. You can program the FPGA VI to bundle scalar data into arrays or clusters and then read or write the arrays or clusters of data as a single block with the host VI to make sure all data is read or written at the same time. You can use the Read/Write Control function to read whole clusters or an individual element of a cluster. If you need to read multiple elements of a cluster, read the whole cluster. You can write to a whole cluster, but you cannot write to individual elements of a cluster. Be careful not to overuse arrays because arrays use space on an FPGA target.|
The FPGA Module creates a register map, specific to the FPGA VI, that includes a hardware register for every control and indicator. LabVIEW uses the register map internally to communicate with the FPGA VI directly with interactive front panel communication and using the host VI with programmatic FPGA interface communication.