LabVIEW 2018 FPGA Module Help
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You must compile an FPGA VI into a bitfile before you can download and run the FPGA VI on an FPGA target. The following sections outline the build process.
Creating an FPGA VI Build Specification
You must create a build specification to compile an FPGA VI into a bitfile for the FPGA. Build specifications give the compiler instructions on how to create the bitfile.
Complete the following steps to create a build specification through the Project Explorer window.
- Right-click Build Specifications in the Project Explorer window and select New»Compilation from the shortcut menu to display the Compilation Properties dialog box.
You also can right-click an existing build specification in the Project Explorer window and select Properties from the shortcut menu to display this dialog box.
- Specify the build specification name and other descriptive information on the Information page of the dialog box.
- Display the Source Files page to specify the top-level VI. FPGA VIs can have only one top-level VI.
- If available for your FPGA target, configure the Xilinx build options on the Xilinx Options page.
- Click the OK button to close the dialog box or click the Build button to begin compiling the FPGA VI.
Compilation Properties Dialog Box
Working with FPGA Build Specifications
Compiling an FPGA VI
To compile an FPGA VI, you must set the execution mode of the FPGA target to execute FPGA VIs on the target. Right-click the target and select Select Execution Mode»FPGA Target from the shortcut menu.
You can compile FPGA VIs in the following ways:
- Click the Run button to compile the FPGA VI. If the FPGA target you use supports interactive front panel communication, LabVIEW automatically runs the FPGA VI on the FPGA target. Clicking the Run button compiles the VI only if the VI or project has changed since you last compiled the VI.
- Right-click an FPGA build specification in the Project Explorer window and select Build or Rebuild from the build specification shortcut menu.
The compilation process goes through several stages. Compiling FPGA VIs can take from a few minutes to a few hours. NI recommends testing and debugging an FPGA VI before you compile it.
Interactive Front Panel Communication
Understanding the LabVIEW FPGA Compile System
Downloading a Compiled FPGA VI
After you compile the FPGA VI, you can download and run the FPGA VI on the FPGA target.
||Note You can download and run only one FPGA VI at a time on a single FPGA target. If you attempt to download a second VI to the FPGA target while the first FPGA VI is still in use, LabVIEW reports an error and the download fails.
You can download the compiled VI in the following ways.
- Right-click a compilation build specification in the Project Explorer window and select Download from the shortcut menu to download the FPGA VI.
- Programmatically force the FPGA VI to download using FPGA interface functions.
- If the target supports interactive front panel communication, click the Run button on an FPGA VI. If the FPGA VI is new or has changed, the FPGA VI will compile and download to the FPGA target automatically after the compilation completes. However, LabVIEW does not download the FPGA VI if the VI is already on the FPGA target.
- Store the FPGA VI in flash memory if the target supports flash memory.
If the Run when loaded to FPGA checkbox is enabled in the Information page of the Compilation Properties dialog box for your FPGA build specification, the FPGA VI automatically runs on the FPGA target after the download is complete. Otherwise, you must manually run the FPGA VI on the FPGA target after you download the FPGA VI.
Downloading an FPGA VI to an FPGA Target (FPGA Interface)
Downloading an FPGA VI to the Flash Memory of an FPGA Target
Running a Compiled FPGA VI
You can run the FPGA VI in the following ways.
- Use the FPGA interface to run the FPGA VI. You can build host VIs to programmatically read and write to the front panel window of the FPGA VI using programmatic FPGA interface communication.
- If the target supports interactive front panel communication, click the Run button to run the VI. If you run an FPGA VI using interactive front panel communication, you cannot close the FPGA VI without stopping the VI running on the FPGA target.
- Run the FPGA VI automatically from the flash memory if the target has flash memory.
Using a Host VI to Communicate with the FPGA Target
Running FPGA VIs Automatically from Flash Memory