|LabVIEW 2015 FPGA Module Help|
|LabVIEW 2016 FPGA Module Help|
|LabVIEW 2017 FPGA Module Help|
|LabVIEW 2018 FPGA Module Help|
|LabVIEW 2019 FPGA Module Help|
March 2018, 371599P-01
With the LabVIEW FPGA Module and LabVIEW, you can create VIs that run on NI FPGA targets, such as Reconfigurable I/O (RIO) devices. FPGA targets contain a reconfigurable FPGA (Field-Programmable Gate Array) surrounded by fixed I/O resources. Depending on the specific FPGA target, fixed I/O resources can include analog and digital resources, such as analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), that you can control from the FPGA.
With the FPGA Module, you configure the behavior of the reconfigurable FPGA to match the requirements of a specific measurement and control system. The VI you create to run on an FPGA target is called the FPGA VI. Use the FPGA Module to write FPGA VIs. When you download the FPGA VI to the FPGA, you are programming the functionality of the FPGA target. Each new FPGA VI you create and download is a custom timing, triggering, and I/O solution.
You must purchase and install the FPGA Module to use these programming features. However, the FPGA Interface functions are available with FPGA target driver software. You do not need the FPGA Module to use the FPGA Interface functions.
You can use FPGA IP Builder to efficiently implement your LabVIEW algorithms for FPGA targets and to generate FPGA code that meets specific performance requirements. FPGA IP Builder does not require that you place LabVIEW FPGA code inside a single-cycle Timed Loop.
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