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BF538 Memory Spaces (Blackfin, Embedded Module)

The following table lists the memory spaces for the BF538 processor to help you map code and data the Blackfin VIs generate.

Memory Space Description Size
0xFFE00000–0xFFFFFFFF Core MMR registers 2 MB
0xFFC00000–0xFFDFFFFF System MMR registers 2 MB
0xFFB01000–0xFFBFFFFF Reserved —
0xFFB00000–0xFFB00FFF Scratch SRAM 4 KB
0xFFA14000–0xFFAFFFFF Reserved —
0xFFA10000–0xFFA13FFF Instruction SRAM/cache 16 KB
0xFFA00000–0xFFA0FFFF Instruction SRAM 64 KB
0xFF908000–0xFF9FFFFF Reserved –
0xFF904000–0xFF907FFF Data Bank B SRAM/cache 16 KB
0xFF900000–0xFF903FFF Data Bank B SRAM 16 KB
0xFF808000–0xFF8FFFFF Reserved —
0xFF804000–0xFF807FFF Data Bank A SRAM/cache 16 KB
0xFF800000–0xFF803FFF Data Bank A SRAM 16 KB
0xEF000000–0xFF7FFFFF Reserved —
0x20400000–0xEEFFFFFF Reserved —
0x20300000–0x203FFFFF ASYNC Memory Bank 3 1 MB
0x20200000–0x202FFFFF ASYNC Memory Bank 2 1 MB
0x20100000–0x201FFFFF ASYNC Memory Bank 1 1 MB
0x20000000–0x200FFFFF ASYNC Memory Bank 0 1 MB
0x08000000–0x1FFFFFFF Reserved —
0x00000000–0x07FFFFFF SDRAM Memory 16 MB–128 MB

Refer to the ADI Blackfin processor hardware documentation for more information about Blackfin memory maps.


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