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| AI |
analog input
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| alarm |
A notification that the value of a particular channel has gone outside a specified range of values. An alarm triggers the execution of a specified procedure.
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| alias |
An alternate name for a channel in a system definition file.
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| AO |
analog output
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| API |
application programming interface—A set of functions you use to control a specific service, such as the VeriStand Engine or the Workspace window.
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| bit |
One binary digit, either 0 or 1.
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| bitfile |
A LabVIEW-generated file that defines the available I/O on the FPGA. A bitfile is a compiled version of an FPGA VI.
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| block diagram |
A pictorial description or representation of a program or algorithm. In LabVIEW, the block diagram that consists of executable icons called nodes and wires that carry data between the nodes. The block diagram is the source code for the VI. The block diagram resides in the block diagram window of the VI.
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| byte |
Eight related bits.
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| calculated channel |
A channel that produces a new value based on calculations performed on other channels in the system.
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| calibration |
The process of determining the accuracy of an instrument. In a formal sense, calibration establishes the relationship of an instrument's measurement to the value provided by a standard. When that relationship is known, the instrument may then be adjusted (calibrated) for best accuracy.
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| CAN |
controller area network—A serial bus finding increasing use as a device-level network for industrial automation. CAN was developed by Bosch to address the needs of in-vehicle automotive communications.
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| custom device |
A virtual instrument that executes user-defined actions, such as third-party hardware control.
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| DI |
digital input
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| differential measurement system |
A way to configure a device to read signals, in which you do not need to connect either input to a fixed reference, such as the earth ground or a building ground.
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| DIO |
digital input/output
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| DLL |
See model DLL.
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| DMA |
direct memory access—A method by which data can be transferred to/from computer memory from/to a device or memory on the bus while the processor does something else. DMA is the fastest method of transferring data to/from computer memory.
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| DO |
digital output
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| driver |
Software that controls a specific hardware device.
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| execution host |
The desktop PC or real-time (RT) target on which you run the system definition file and VeriStand Engine.
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| FIFO |
first-in-first-out memory buffer—The first data stored is the first data sent to the acceptor.
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| FPGA |
field-programmable gate array—Fundamentally, an FPGA is a semi-conductor device that contains a large quantity of gates (logic devices), which are not interconnected, and whose function is determined by a wiring list, which is downloaded to the FPGA. The wiring list determines how the gates are interconnected, and this interconnection is performed dynamically by turning semiconductor switches on or off to enable the different connections.
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| FPGA configuration file |
An XML-based file that specifies the content of DMA FIFOs.
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| FPGA VI |
A configuration that is downloaded to the FPGA and that determines the functionality of the hardware.
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| frequency |
f, the basic unit of rate, measured in events or oscillations per second using a frequency counter or spectrum analyzer. Frequency is the reciprocal of the period of a signal.
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| HIL |
hardware-in-the-loop—A simulation configuration in which you test a controller implementation with a simulated system. See also RCP.
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| host computer |
The computer that runs the VeriStand Gateway and hosts the user interface of the workspace file.
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| Hz |
Hertz—Cycles per second of a periodic signal. The unit of measure for frequency.
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| I/O |
input/output—The transfer of data to/from a computer system involving communications channels, operator interface devices, and/or data acquisition and control interfaces.
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| LabVIEW |
Laboratory Virtual Instrument Engineering Workbench—A graphical programming language.
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| mapping |
A connection between two channels.
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| Measurement & Automation Explorer (MAX) |
Provides a centralized location for configuration of National Instruments hardware products. MAX also provides many useful tools for interaction with hardware.
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| MIO |
multifunction I/O—DAQ module. Designates a family of data acquisition products that have multiple analog input channels, digital I/O channels, timing, and optionally, analog output channels. An MIO product can be considered a miniature mixed signal tester, due to its broad range of signal types and flexibility. Also known as multifunction DAQ.
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| model |
A mathematical representation of a real-world system that responds to stimuli by producing outputs in a way that emulates the behavior of the modeled item.
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| model DLL |
A model in compiled form.
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| NI |
National Instruments
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| NI VeriStand Server |
The server that uses a TCP/IP connection to transmit data between NI VeriStand and your uncompiled model (.mdl) running in the Simulink software environment.
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| NRSE |
nonreferenced single-ended mode—All measurements are made with respect to a common (NRSE) measurement system reference, but the voltage at this reference can vary with respect to the measurement system ground.
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| offline |
A simulation configuration in which you use software to simulate the controller and the system you want to control. No hardware is involved in an offline simulation.
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| PC |
personal computer
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| PCI |
peripheral component interconnect—An industry-standard, high-speed databus.
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| port width |
Refers to the number of lines in a port. For example, E Series devices have one port with eight lines; therefore, the port width is eight.
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| procedure |
A set of actions that the VeriStand Engine executes.
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| PWM |
pulse-width modulation
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| quadrature encoder |
An encoding technique for a rotating device where two tracks of information are placed on the device, with the signals on the tracks offset by 90º from each other. This makes it possible to detect the direction of the motion.
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| RAM |
random-access memory—The generic term for the read/write memory that is used in computers. RAM allows bits and bytes to be written to it as well as read from.
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| RCP |
rapid control prototype—A simulation configuration in which you test plant hardware with a software model of the controller. See also HIL.
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| real-time (RT) |
Pertaining to the performance of a computation during the actual time that the related physical process transpires so results of the computation can be used in guiding the physical process.
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| RSE |
referenced single-ended configuration—All measurements are made with respect to a common reference measurement system or ground. Also called a grounded measurement system.
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| RT |
See real-time.
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| RTSI |
real-time system integration bus—The National Instruments timing bus that interconnects data acquisition devices directly by means of connectors on top of the devices for precise synchronization of functions.
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| SCXI |
Signal Conditioning eXtensions for Instrumentation—The National Instruments product line for conditioning low-level signals within an external chassis near sensors so that only high-level signals are sent to DAQ devices in the noisy PC environment.
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| stimulus generator |
Produces simulated real-world signals that stimulus profiles use to perform tests on a system. See stimulus profile.
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| stimulus profile |
A file that contains Stimulus Profile Editor settings, such as stimulus generator mappings and the locations of any calibration files and header VIs you add. You create and run a stimulus profile using the Stimulus Profile Editor. A stimulus profile can have a .bt1, .et1, or .et2 extension, depending on whether it is a batch, step-based, or table-based stimulus profile. See Stimulus Profile Editor.
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| Stimulus Profile Editor |
A tool you can use at run time to create and run tests and to log and analyze data. See stimulus profile.
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| system channel |
A channel that monitors the state and condition of various internal aspects of the NI VeriStand system.
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| system definition file |
The .in4 file you configure primarily in the System Explorer window. A system definition file contains the configuration settings of the VeriStand Engine.
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| TCP/IP |
Transmission Control Protocol/Internet Protocol—A standard format for transmitting data in packets from one computer to another. The two parts of TCP/IP are TCP, which deals with the construction of data packets, and IP, which routes them from computer to computer.
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| TestStand |
National Instruments test executive for sequencing and managing automatic test programs.
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| timing and sync device |
A virtual instrument that synchronizes more than one chassis.
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| user channel |
A channel that stores a single value.
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| VeriStand Engine |
The non-visible execution mechanism that controls the timing of the entire system as well as the communication between the execution host and the host computer.
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| VeriStand Gateway |
The non-visible mechanism that creates a TCP/IP communication channel which facilitates communication with the VeriStand Engine over the network. The VeriStand Gateway receives channel values from the VeriStand Engine and stores these values in a table that can be viewed using the Channel Data Viewer, available in the Tools menu of the Workspace window.
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| VI |
virtual instrument—A LabVIEW program.
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| workspace file |
The .rig file that defines the available users and their permissions, determines which system definition file runs on the execution host, specifies the IP address of a real-time (RT) target, and defines the test environment with which an operator interacts, including the user interface you view in the Workspace window and the list of tools you can launch from the Tools menu of the Workspace window.
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