Synchronizing an Asynchronous Custom Device with the Primary Control Loop

NI VeriStand 2018 Help

Edition Date: May 2018

Part Number: 372846M-01

»View Product Info
Download Help (Windows Only)

Parent Topic: Customizing the Custom Device Driver

You can configure an asynchronous custom device to run synchronously with the rest of NI VeriStand by configuring the custom device to use the same timing source as the Primary Control Loop (PCL). For example, NI VeriStand can use a DAQ device as the timing source for the PCL. You can configure the RT Driver VI of your asynchronous custom device to use the same timing source.

When you synchronize your custom device to the PCL, your custom device will not delay PCL if it finishes late.

The following example illustrates the code required to synchronize an asynchronous custom device with the PCL.

I. Add and Configure the Set Loop Type VI in the Initialization VI

The previous block diagram shows the Set Loop Type VI added to an Initialization VI and configured to allow you to synchronize the asynchronous custom device with the PCL. First, the Loop type input specifies that the custom device will use a Timed Loop, which then allows you to set the Use Device Clock (Timed Loops only) input to TRUE. When this input is TRUE, NI VeriStand passes the timing source from the PCL to the Device Clock control in the RT Driver VI.

Note  You can add and configure the Set Loop Type VI in any VI for configuring the custom device, such as a page VI. For example, if you want a user to be able to specify whether or not to synchronize the custom device to the PCL, you could add and configure the Set Loop Type VI in the Main Page VI of the custom device.

The following step shows you how to configure your RT Driver VI to use the Device Clock control as the timing source for its Data Loop.

II. Configure the RT Driver VI to Use the PCL Timing Source

The previous block diagram illustrates an asynchronous RT Driver VI configured to run in sync with the PCL. Before configuring your asynchronous RT Driver VI as shown above, you must change the device's Data Loop from the default While Loop to a Timed Loop. You can do this by right-clicking the While Loop and selecting Replace with Timed Loop The following list explains how to configure the Input Node of the Timed Loop:

  1. Device Clock specifies the name of a timing source that is ticked for every iteration of the PCL after the Custom Device FIFOs have been updated. NI VeriStand passes this timing source to the custom device. By wiring Device Clock to Source Name, the Timed Loop will run according to the same timing source as the PCL.
  2. The Get Asynchronous Driver VI Timed Loop Name VI returns the System Explorer path to the custom device as a string. This string serves as the unique Structure Name of the Data Loop Timed Loop, ensuring the VeriStand Engine synchronizes the start of this Timed Loop with the start of the PCL.
  3. The Get Custom Device Decimation VI returns the decimation factor of the custom device, or how many iterations of the PCL occur between calls to the custom device. This decimation factor serves as the Period of the Data Loop Timed Loop. The default value, 1, specifies no decimation, meaning the PCL will call the custom device on every iteration. This configuration allows you to use the Set Custom Device Decimation VI in one of the VIs for configuring your custom device, such as Initialization VI or a page VI, to specify a decimation.
    Note  For asynchronous custom devices, the decimation only affects when the Primary Control Loop reads and writes the FIFOs it uses to communicate with the custom device.
  4. Get Timed Loop Priority VI outputs the priority (Low, Medium, or High) of the Timed Loop. Convert Timed Loop Priority VI converts this enumeration value to a numeric value that the Priority terminal of the Timed Loop input node accepts.

WAS THIS ARTICLE HELPFUL?

Not Helpful