LabVIEW 2013 FPGA IP Builder Help
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In Part 3 of this tutorial, you create a directives item for the fixed-point filter algorithm VI. You then configure the directives to make sure the algorithm meets specific application requirements. In Part 4 of this tutorial, you create build specifications from the directives item and then generate FPGA IP.
Creating Build Specifications
Complete the following steps to create build specifications from a directives item.
- Open the project you saved in Part 3 of this tutorial.
- In the Project Explorer window, navigate to My Computer»FPGA Target (PXI-7851R)»IP Builder.
- Right-click the FIR directives item and select Create IP Build from the shortcut menu.
A project item with the same name FIR directives as the directives item you selected appears under IP Builder»Build Specifications.
- Double-click the new item to open the IP Build Specifications dialog box.
- On the Information page, verify the build specifications, such as the generated VI name and destination directory, and click OK.
- Save the project.
Generating FPGA IP
After you create build specifications from the directives item, complete the following steps to generate FPGA IP.
- Right-click the build specification item you created in the previous section and select Build from the shortcut menu.
- In the Build FPGA IP dialog box, view the build reports when they are available, and verify the report meets the application requirements.
- Click the Close button to close the Build FPGA IP dialog box.
A folder with the name IP Builder Generated VIs appears under My Computer»FPGA Target (PXI-7851R). This folder contains the generated FPGA IP with the name FIR directives Generated.vi.
- Double-click the FIR directives Generated.vi to view the front panel and block diagram components. Notice that the generated FPGA IP contains three more terminals than the original fixed-point filter algorithm VI: input valid, output valid, and feedback signals. These terminals are necessary for passing handshaking signals in an FPGA application.
- Save the project.
After you generate FPGA IP, you can validate the FPGA IP in Part 5 of this tutorial.