Glossary

NI-Sync 18.0 for Windows Help

Edition Date: May 2018

Part Number: 373629D-01

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Prefixes

Symbol Prefix Value
n nano 10 -9
µ micro 10 -6
m milli 10 -3
M mega 10 6
G giga 10 9

Numbers/Symbols


1588 epoch

A period of absolute time defined by the IEEE 1588 specification. The current 1588 epoch is assigned the number 0 and started at 0 hours 1 January 1970. The length of a 1588 epoch is 2³² seconds.
1588 grandmaster clockThe 1588 clock to which all other 1588 devices in a specific PTP subdomain are synchronized
1588 master clockThe 1588 clock to which other 1588 devices are synchronized if they are directly connected to it (that is, they are not connected via a boundary clock)
1588 timeThe time format specified by IEEE 1588. IEEE 1588 represents time as a 32-bit unsigned integer for the number of seconds and a 32-bit unsigned integer for the number of nanoseconds since the 1588 epoch. From 1 January 1972 onward, 1588 time follows TAI time with an offset of 10 seconds.

A

accumulator A part where numbers are totaled or stored
asynchronous A property of an event that occurs at an arbitrary time, without synchronization to a reference clock

B

backplane An assembly, typically a printed circuit board (PCB), with 96-pin connectors and signal paths that bus the connector pins. PXI systems have two connectors, called the J1 and J2 connectors.
BMCBest Master Clock—an algorithm that determines which clock in a 1588 network should be used as the grandmaster clock.
bus The group of conductors that interconnect individual circuitry in a computer. Typically, a bus is the expansion vehicle to which I/O or other devices are connected. An example of a PC bus is the PCI bus.

C

C Celsius
ClkIn ClkIn is a signal connected to the SMB input pin of the same name. ClkIn can serve as PXI_Clk10_IN or be used as a phase lock reference for the OCXO.
ClkOut ClkOut is the signal on the SMB output pin of the same name. The OCXO clock, DDS clock, or PXI_Clk10 may be routed to ClkOut.
clock A hardware component that controls timing for reading from or writing to groups

D

DAC Digital-to-analog converter—an electronic device that converts a digital number into a corresponding analog voltage or current
DAQ Data acquisition—(1) collecting and measuring electrical signals from sensors, transducers, and test probes or fixtures and inputting them to a computer for processing; (2) collecting and measuring the same kinds of electrical signals with A/D and/or DIO devices plugged into a computer, and possibly generating control signals with D/A and/or DIO devices in the same computer.
DC Direct current
DDS Direct Digital Synthesis—A method of creating a clock with a programmable frequency
duty cycle (n.), duty-cycle (adj.)The ratio of the duration (time) that a signal is on to the total period of the signal

E

EEPROM Electrically erasable programmable read-only memory—ROM that can be erased with an electrical signal and reprogrammed

F

frequency The basic unit of rate, measured in events or oscillations per second using a frequency counter or spectrum analyzer. Frequency is the reciprocal of the period of a signal.
front panel The physical front panel of an instrument or other hardware

G

GPSGlobal Positioning System—a system of satellites that broadcast accurate times. GPS receivers acquire these times, which you can use to establish geographic position. You can also use the time received as an accurate clock source.

H

Hz Hertz—the number of scans read or updates written per second

I

IEEE 1588The IEEE specification that describes a synchronization protocol for clocks of multiple devices connected via a network
in. Inch or inches
IPInternet Protocol—a packet-based protocol used to communicate between multiple computer systems on a network. The IP is a low-level protocol on top of which other, more reliable, protocols are often defined.

J

jitter The rapid variation of a clock or sampling frequency from an ideal constant frequency

L

LED Light-Emitting Diode—a semiconductor light source

M

master The requesting or controlling device in a master/slave configuration
Measurement & Automation Explorer (MAX) A controlled centralized configuration environment that allows you to configure all of your National Instruments DAQ, GPIB, IMAQ, IVI, Motion, VISA, and VXI devices

N

NTPNetwork Time Protocol—a protocol that synchronizes the clocks of computers connected via an IP network. You may use NTP to synchronize computer clocks over a very wide geographical area.

O

OCXO Oven-controlled crystal oscillator
oscillator A device that generates a fixed frequency signal. An oscillator most often generates signals by using oscillating crystals, but may also use tuned networks, lasers, or atomic clock sources. The most important specifications on oscillators are frequency accuracy, frequency stability, and phase noise.
output impedance The measured resistance and capacitance between the output terminals of a circuit

P

PCI Peripheral Component Interconnect—a high-performance expansion bus architecture originally developed by Intel to replace ISA and EISA. It is achieving widespread acceptance as a standard for PCs and work-stations; it offers a theoretical maximum transfer rate of 132 Mbytes/s.
PFI Programmable Function Interface
PLL Phase-locked loop
precision The measure of the stability of an instrument and its capability to give the same measurement over and over again for the same input signal
propagation delay The amount of time required for a signal to pass through a circuit
PTPPrecision Time Protocol—the IEEE 1588-defined network protocol used to synchronize the clocks of multiple devices connected via a network
PXI A rugged, open system for modular instrumentation based on CompactPCI, with special mechanical, electrical, and software features. The PXIbus standard was originally developed by National Instruments in 1997, and is now managed by the PXIbus Systems Alliance.
PXI Star A special set of trigger lines in the PXI backplane for high-accuracy device synchronization with minimal latencies on each PXI slot

R

RMSroot mean square—The square root of the average value of the square of the instantaneous signal amplitude; a measure of signal amplitude. The RMS voltage of a signal is computed by squaring the instantaneous voltage, integrating over the desired time, and taking the square root.

S

sSeconds
skew The actual time difference between two events that would ideally occur simultaneously. Inter-channel skew is an example of the time differences introduced by different characteristics of multiple channels. Skew can occur between channels on one module, or between channels on separate modules (intermodule skew).
slave A computer or peripheral device controlled by another computer
slot The place in the computer or chassis in which a card or module can be installed
Slot 2 The second slot in a PXI system, which can house a master timing unit
SMB Sub Miniature Type B—a small coaxial signal connector that features a snap coupling for fast connection
synchronization clockA clock that controls the frequency at which triggers fire in the front and rear zones of a PXI chassis.
synchronous A property of an event that is synchronized to a reference clock

T

TAI International Atomic Time. Unlike UTC, TAI does not account for leap seconds. Therefore, TAI is the time system employed by network standards for which leap seconds may be problematic.
tri-state A state in which an output driver assumes high impedance and does not drive a voltage
TRIG Trigger signal
trigger A digital signal that starts or times a hardware event (for example, starting a data acquisition operation)

U

UTC Coordinated Universal Time—the time system that accounts for leap seconds and is employed by many network standards, including NTP

V

V Volts
VI Virtual instrument

Z

zone The location of trigger lines in a PXI chassis. There are two zones:
  1. front zone—Contains the front panel connectors of the PXI chassis, including PFI and PFI_LVDS lines.
  2. rear zone—Contains the backplane trigger lines of the PXI chassis, including PXI_Trig and PXI_Star.

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