Configuring I/O Pins on the Target

NI Single-Board RIO CLIP Generator Help

Edition Date: August 2015

Part Number: 375106C-01

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Complete the following steps to use the Pin Configuration page of the sbRIO CLIP Generator to configure the I/O pins on the NI sbRIO target.

Notes Notes
  • The options on the Pin Configuration page correspond to Xilinx I/O standards and attributes. Refer to Xilinx documentation for more information about Xilinx I/O standards and attributes.
  • Click the Import from CSV or Export to CSV buttons on the bottom left of this page to import or export pin configuration data in a CSV file.
  1. Select a pin in the CLIP Pins table.
  2. Use the Pin Settings pane to configure the following options for the pin:
    • I/O Standard—The I/O standard of the I/O buffer for the pin.
    • Direction—The direction of the I/O buffer for the pin.
      Note Note  The direction you select is independent of the direction of a LabVIEW port or clock. For example, if you select Input for the pin direction you can still use the pin in a Read/Write LabVIEW FPGA I/O node, but writing to the pin will have no effect.
    • Drive Strength—The output drive strength, in mA, for the pin.
    • Slew—The output slew rate, which is the rate of transition between output levels, for the pin.
    • Pull—The pull behavior for the pin. Select one of the following options:
      • None—Does not affect the input pin.
      • Up—Drives the input pin to its high value when the pin is not being driven.
      • Down—Drives the input pin to its low value when the pin is not being driven.
      • Keeper—Preserves the last value of the pin when the pin is not being driven.
    Notes Notes
    • Refer to Xilinx documentation for more information about these and other I/O standards and attributes.
    • Some pins that a peripheral uses may allow you to specify a pin setting value of Custom. For such pins to function correctly, you must modify the generated CLIP files after you finish using the sbRIO CLIP Generator to supply the required custom value.
  3. Use the Bank Voltage Levels pane to specify the voltage level supplied to each bank of pins.
    Notes Notes
    • Not all configurations of pin settings and bank voltage levels are valid. You must specify a valid configuration to enable the Next button and continue in the sbRIO CLIP Generator. If you specify an invalid configuration, the Next button is disabled and the CLIP Pins table displays a warning icon. Hover over the warning icon to display a tooltip that includes information about the error to resolve.
    • If you configure a pin to use a differential I/O standard, the pin and its positive or negative pair function as a single input or output. For example, if you configure the DIO_23 pin to use the LVDS25 I/O standard, the DIO_23_N pin becomes disabled in the CLIP Pins table and all of its settings match those of the DIO_23 pin. This change occurs because the value of the DIO_23 pin now represents the voltage differential between the DIO_23 and DIO_23_N pins, and therefore the DIO_23_N pin no longer has a meaningful value.
    Caution Caution  Although the sbRIO CLIP Generator provides error-checking to ensure that your pin settings are valid, nothing prevents you from supplying a different voltage to the physical bank than the voltage specified in software.
  4. Click Next to continue to the LabVIEW Interface page.
 

Continue: Continue

Creating a LabVIEW I/O Node Interface for a CLIP

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