D-Latch

Multisim Help


Edition Date: February 2017
Part Number: 375482B-01
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Multisim 14.0 and 14.0.1 Help
Multisim 14.1 Help
Multisim 14.2 Help

D-Latch instance declaration syntax:

Axxxx Data Enable Set Reset Q notQ MyModel

D-Latch model definition syntax:

.MODEL MyModel d_latch(<Model_Parameters>)

Model definition parameters:

Parameter Name
Parameter Description
Units
Default
DATA_DELAY
Data Propagation delay.
s
1e-9
ENABLE_DELAYS
Enable propagation delay.
s
1e-9
SET_DELAYS
Set propagation delay.
F
1e-9
RESET_DELAYS
Reset propagation delay.
s
1e-9
IC
Initial Condition on the output (in case enable=LOW) 0 – LOW, 1-HIGH, 2-UNKNOWN.
0

Description

This is D-Latch with asyncronous set and reset. The Enable signal is also known as the Clock signal. It has the following behavior:

Data
Enable
Set
Reset
Q
D
1
0
0
D
0
0
0
Last State
1
0
1
0
1
0
1
1
X

Where '-' denotes Don't Care, '1' denotes HIGH, '0' denotes LOW, and 'X' denotes UNKNOWN.

Example

aU4 1
+ 2
+ 5
+ 6
+ dU4.Q
+ U4_OPEN_notQ Latch
.model latch d_latch(rise_delay=10n fall_delay=10n)

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