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Multisim Help

Edition Date: February 2017

Part Number: 375482B-01

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SPICE Subcircuits

A SPICE subcircuit wraps around a block of circuit text and allows external connections to this circuitry only through the subcircuit's port. The benefit of this is that the internal circuitry is isolated from external circuitry, thus internal devices and node names with the same names as those external to the subcircuit are neither conflicting nor shorted. In addition, subcircuits can accept circuit parameters which can be used to assign values to internal devices or nested subcircuits.

A subcircuit is an extremely useful concept, forming the basis of any modular or hierarchical design.

Subcircuit Definition

.SUBCKT mysubcktname node1 <node2 <>> <OPTIONAL: optionalnode1=defaultnode1 <optionalnode2=defaultnode2 <>>> <PARAMS: param1=default1 <param2=default2 <>>> <Subcircuit Contents>
.ENDS

Identifier
Description
mysubcktname
Arbitrary subcircuit identifier that links the subcircuit to an instance declaration.
nodeN
where N=1,2,3…
The name of the Nth node for the subcircuit port. These are the nodes that Multisim's component symbol pins would be mapped to.
optionalnodeN
where N=1,2,3…
The name of the Nth optional node for the subcircuit port. These nodes are optionally included on the instance line and if they are not provided then they will be connected to optionalnodeN. Optional nodes are not available on Multisim components and thus they are not useful on the top level models of a component.
defaultnodeN
where N=1,2,3…
The default node to connect to for optionalnodeN if that node is not provided on the instance line. This node should be a valid node from outside this subcircuit declaration.
paramN
where N=1,2,3…
The name of the Nth input circuit parameter for the subcircuit.
paramN
where N=1,2,3…
A default value for the Nth input parameter if PARAMN is not specified on the subcircuit instance declaration.

A subcircuit definition is only useful if it is referenced by one or more instance declarations inside a circuit. This can be done as a top level model of a component on a schematic or by declaring an instance of the subcircuit within a model.

Instance Declaration

Xanyname node1 <node2 <>> mysubcktName <PARAMS: PARAM1=expression1 <PARAM2=expression2 <>>>

Identifier
Description
nodeN
where N=1,2,3…
The Nth node for the subckt. The number of nodes must match the number of nodes in the subcircuit definition.
mysubcktName
An arbitrary subcircuit identifier linking the instance declaration to a subcircuit.
paramN
where N=1,2,3…
The name of the input parameter for the subckt. The nodes do not have to be in the same order as the subcircuit definition and do not all need to be present. If any particular PARAMN is omitted then the subcircuit will use defaultN.
expressionN
where N=1,2,3…
The expression for the Nth input parameter. See the expression section for details regarding expressions.

Additional Notes

  • This SPICE-based subcircuit should not be confused with a Multisim schematic capture subcircuit which is used to created hierarchy with schematic symbols.
  • If the "PARAMS:" keyword is omitted within the circuit parameters portion of the declaration, the entire circuit parameters portion must be enclosed by round "( )" or curly "{ }" parenthesis.
  • Node "0" is a global node - regardless of circuit or subcircuit hierarchy, all nodes with the name "0" are connected together.

Examples

*A resistive voltage divider circuit that uses a resistor subcircuit model. The upper resistor is 10k and the lower is 47k
V1 in 0 10
X1 in mid res_block params: res_val=10k
X2 mid 0 res_block
.subckt res_block 1 2 params: res_val=47k
R1 1 2 {res_val}
.ends

*expression usage
.param gain=100
V1 5 0 3.3
X1 5 8 AMP PARAMS: ampgain={limit(gain, 200, 80)}
.subckt AMP in out PARAMS: ampgain=90
E1 out 0 in 0 {ampgain}
.ends

 

Related Information

Advanced Pin Mapping


 

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