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Configuring DRAM with FPGA Memory Items

NI ATCA FPGA Modules Help

Edition Date: March 2017

Part Number: 376468A-01

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The ATCA-3671 Getting Started DRAM example demonstrates how to access external DRAM memory from the FPGA. Complete the following steps to configure DRAM with FPGA memory items using the ATCA-3671 Getting Started DRAM VI.

  1. Open the ATCA-3671 Getting Started DRAM.lvproj by selecting Start»All Programs»National Instruments»NI ATCA FPGA Modules»NI ATCA Examples»LabVIEW 2016»External Memory»DRAM - Getting Started.
  2. Open the Getting Started – External Memory (FPGA).vi from the project. This VI demonstrates the various methods for accessing the DRAM from the FPGA on the ATCA-3671.
Examine the front panel input controls:
DRAM selection
  1. Open the Getting Started — External Memory (Host).vi from the project. This Host VI controls the data that flows into and out of the different external memory access methods on the FPGA.
Examine the front panel input controls:
DRAM selection
  • RIO Device—RIO Device Resource Name for the FPGA you want to use.
  • IP Address—IP Address of the ATCA-3671 under test.
  • External Memory Access Method Tab—Tab control with each page representing the different methods of accessing the external memory. Select either the Memory Primitive Method, Memory IDL Method, or DRAM FIFO Method tab.
  • Write Data—Numeric control that specifies the data to be written to the external memory.
  • Write Address—Numeric control that specifies the address to which the data has to be written.
  1. Click the Run button to run the Getting Started – External Memory (Host).vi.

 

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