ATCA-3671 Configure Jitter Cleaner VI

NI-ATCA FPGA Modules Help

Edition Date: September 2018

Part Number: 376468B-01

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Used to configure the TI LMK04808 jitter cleaning PLL on the ATCA-3671 with a full set of input and output frequencies. All frequency values are provided in kHz, and a locked output is returned which indicates the lock state of the PLL after all corresponding register values have been programmed into the device. Ensure all values match the configuration of the FPGA target and any other externally-connected hardware.

atca3671_configure_jitter_cleaner_vi

u32 VCO frequency (kHz) defines the frequency, in kHz, to be used for the voltage controlled oscillator (VCO) in the second stage PLL of the jitter cleaner. It must be within the valid range for the device type (for example, the LMK04808 requires a VCO between 2.75 GHz and 3.072 GHz) and achievable with a valid combination of multiplier/divider settings. The actual settings used on the device are automatically calculated by software.
u32 input frequency (kHz) defines the input frequency, in kHz, being driven into the jitter cleaner. input frequency (kHz) should be set to match both parameters of the FPGA target in the External Clock Configuration properties and any other equipment connected to the hardware device.
fpga_reference_in FPGA reference in references the desired FPGA.
error in error in describes error conditions that occur before this node runs. This input provides standard error in functionality. If error in indicates an error, the node doesn't execute.
u32 GTH output frequency (kHz) determines the frequency, in kHz, to be generated for the GTH transceiver reference clock outputs on the device. Valid values are obtained by dividing the VCO frequency with an integer value between 1 and 1,045.
u32 SMA output frequency (kHz) determines the frequency, in kHz, to be generated for the external SMA clock output on the device. Valid values are obtained by diving the VCO frequency with an integer value between 1 and 1,045.
fpga_reference_out FPGA reference out references the desired FPGA.
TF locked reads the state of the lock detect pin on the jitter cleaner after completing all the register writes necessary to set the input and output frequencies. If the jitter cleaner is not locked, verify that the physical hardware connections and input values are correct.
error_out error out contains error information. This output provides standard error out functionality.

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