FIFO Method Node

LabVIEW 2018 FPGA Module Help

Edition Date: March 2018
Part Number: 371599P-01
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Owning Palette: Data Storage & Transfer Functions

Requires: FPGA Module

Invokes a FIFO method on an FPGA VI. You must specify a FIFO before specifying a method. The available methods vary depending on the FPGA target and the type of FIFO.

Refer to the specific FPGA target hardware documentation for information about the FIFO methods you can use.


FIFO In specifies the FIFO. You can wire a FIFO control, FIFO constant, VI-Defined FIFO Configuration node, or the FIFO Out terminal of another FIFO Method Node to FIFO In.
FIFO Out returns FIFO In if FIFO In is wired. Otherwise, FIFO Out returns the FIFO that you specify in the FIFO Method Node.

FIFO Method Node Details

To use the FIFO Method Node, you first must create a FIFO. After creating a FIFO, add a FIFO Method Node to the block diagram, right-click the node, and select the FIFO from the Select FIFO shortcut menu. Unless the FIFO is a VI-defined FIFO, you can also drag the FIFO from the Project Explorer window to the block diagram to place the configured FIFO Method Node on the block diagram.

When you wire a FIFO to FIFO In, LabVIEW renames the FIFO Method Node to FIFO Item to indicate that the node is now associated with a FIFO in the project. If FIFO In is unwired, you can right-click the FIFO Method Node and select Find Item in Project from the shortcut menu to highlight the FIFO in the Project Explorer window.

Selecting an Interface

You can select between the timeout and handshaking interfaces by right-clicking a FIFO Method Node that invokes a Read or Write method and selecting Interface»Timeout or Interface»Handshaking from the shortcut menu.

By default, FIFO methods use the timeout interface, which allows you to specify a time, in number of clock ticks, that the method waits to complete an operation before it returns a timeout. The timeout interface helps you handle unresponsive devices or sections of code. However, if you use a Read or Write method within a single-cycle Timed Loop, you can enable the handshaking interface to facilitate communication between upstream and downstream nodes in high throughput applications. The handshaking interface reduces the amount of logic needed to implement a handshaking protocol.

Note  You can use the handshaking interface only within a single-cycle Timed Loop for FIFOs that invoke Read or Write methods. Additionally, some targets do not support the handshaking interface for peer-to-peer and DMA FIFOs. LabVIEW returns a compile time error for FIFOs that do not support the handshaking interface.

Displaying Error-Handling Terminals

If an error occurs, you might receive incorrect data. Add error terminals to ensure the data you receive is valid. You also can add error terminals to place the FIFO Method Node in the data flow. Right-click the FIFO Method Node and select Show Error Terminals from the shortcut menu to add standard LabVIEW error in and error out parameters to the function.

Note  Adding error in and error out parameters increases the amount of space the function uses on the FPGA target. The error in and error out parameters also can cause slower execution on the FPGA target.

To use the FIFO Method Node in the data flow without using error terminals, include the node in a Flat Sequence or Stacked Sequence structure.


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