Square Wave Generator Express VI

LabVIEW 2018 FPGA Module Help


Edition Date: March 2018
Part Number: 371599P-01
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Owning Palette: Generation VIs

Requires: FPGA Module

Generates a point-by-point square wave using direct digital synthesis (DDS). The synthesis runs continuously using the block diagram clock rate to produce a real-time frequency. The block diagram clock rate is the top-level clock rate, unless the Square Wave Generator Express VI is inside a single-cycle Timed Loop configured with a different clock rate.

During run time, you can use the Normalize Signal Generation Parameters VI to convert frequency, phase, and duty cycle parameters to fixed-point units normalized to the clock rate.

Details  Examples

Dialog Box Options
Block Diagram Inputs
Block Diagram Outputs

Dialog Box Options

ParameterDescription
Square Wave ParametersContains the following options:
  • Frequency—Specifies the desired output frequency in Hz.
  • Clock rate—Indicates the value you specify in the FPGA clock rate parameter in the Clock section of the configuration dialog box.
  • Frequency (periods/tick)—Returns the scaled output frequency in number of periods per tick of the FPGA clock. The VI calculates this value using the following formula:

    Frequency (periods/tick) = Frequency / Clock rate

    Each call to the VI samples the current value.
  • Phase offset—Specifies the phase in degrees of the signal the Square Wave Generator Express VI returns relative to its initialization.
  • Phase offset (periods)—Returns the scaled phase offset in number of periods. The VI calculates this value using the following formula:

    Phase offset (periods) = Phase offset / 360

  • Duty cycle—Specifies the desired percentage of time the square wave remains high over one period. The default is 50%.
  • Duty cycle (periods)—Returns the scaled percentage of time, in number of periods, the square wave remains high over one period. The VI calculates this value using the following formula:

    Duty cycle (periods) = Duty cycle / 100

OutputContains the following options:
  • Data type—Specifies the data type of the square wave. If you select Boolean, the Amplitude and Offset options are not available.
  • Amplitude—Specifies the amplitude of the square wave. The default is 32767, so square wave out is either –32767 or 32767. Refer to the Details section for more information.
  • Offset—Specifies the DC offset of the square wave. The default is 0. Refer to the Details section for more information.
Execution ModeContains the following options:
  • Inside single-cycle Timed Loop—Guarantees that the VI executes in one cycle. If you select the Inside single-cycle Timed Loop option and place the VI outside a single-cycle Timed Loop, the Code Generation Errors window reports an error.
  • Outside single-cycle Timed Loop—Waits until the VI detects an edge before returning output. You can call this function in a While Loop to control the loop execution rate because the time between edges depends on the frequency. If you select the Outside single-cycle Timed Loop option and place the VI inside a single-cycle Timed Loop, the Code Generation Errors window reports an error.

Signal Output PreviewDisplays a preview of the configured square wave.
ClockContains the following options:
  • FPGA clock rate—Specifies the clock rate at which LabVIEW builds the Square Wave Generator Express VI. If the FPGA clock rate parameter does not match the block diagram clock rate when you compile, the Code Generation Errors window reports an error. Use the Top-Level Clock FPGA Target Properties page to change the block diagram clock rate. If the Square Wave Generator VI is inside a single-cycle Timed Loop, use the Configure Timed Loop dialog box or Source Name input on the Timed Loop to change the block diagram clock rate.
  • Set to top-level clock rate—Sets the FPGA clock rate to the top-level clock rate that is currently configured.

Block Diagram Inputs

ParameterDescription
resetSets the VI to the initial state determined by phase offset (periods). The VI resets automatically when it first runs.
frequency (periods/tick)Specifies the scaled output frequency, in number of periods per tick of the FPGA clock, according to the following formula.

frequency (periods/tick) = frequency (Hz) / FPGA clock rate

To save FPGA resources, leave the frequency (periods/tick) input unwired and use the configuration dialog box to specify the frequency. If you change the value of the frequency (periods/tick) input at run time, the square wave updates on the next call. If you change the frequency, the DDS preserves the position in the period so only the rate changes on the next call.

The value you wire to this terminal must be an unsigned fixed-point data type with a 32-bit word length and a 0-bit integer word length. If you wire a data type with a different configuration to this terminal, LabVIEW coerces the configuration to be <+,32,0>.
phase offset (periods)Specifies the scaled phase offset, in number of periods, according to the following formula.

phase offset (periods) = phase offset (deg) / 360

To save FPGA resources, leave the phase offset (periods) input unwired and use the configuration dialog box to specify the phase offset. If you change the value of the phase offset (periods) input at run time, the square wave updates on the next call. To avoid glitch conditions, do not change the value of the phase offset (periods) input by more than the value of the frequency (periods/tick) input for each call to the VI.

The value you wire to this terminal must be an unsigned fixed-point data type with a 32-bit word length and a 0-bit integer word length. If you wire a data type with a different configuration to this terminal, LabVIEW coerces the configuration to be <+,32,0>.
duty cycle (periods)Specifies the scaled duty cycle, in number of periods, according to the following formula.

duty cycle (periods) = duty cycle (%) / 100

To save FPGA resources, leave the duty cycle (periods) input unwired and use the configuration dialog box to specify the duty cycle. If you change the value of the duty cycle (periods) input at run time, the square wave updates on the next period edge.

The value you wire to this terminal must be an unsigned fixed-point data type with a 32-bit word length and a 0-bit integer word length. If you wire a data type with a different configuration to this terminal, LabVIEW coerces the configuration to be <+,32,0>.
amplitudeSpecifies the amplitude of the square wave. The default is 32767, so square wave out is either –32767 or 32767.
offsetSpecifies the DC offset of the square wave. The default is 0.

Block Diagram Outputs

ParameterDescription
square wave outReturns a Boolean or an 8-, 16-, or 32-bit integer containing the square wave output. If the Square Wave Generator Express VI is inside a single-cycle Timed Loop, square wave out is a single sample point. If the Square Wave Generator Express VI is outside a single-cycle Timed Loop, square wave out updates after each edge of the square wave.

Square Wave Generator Details

Amplitude is the distance between the offset and peak. In the following example, the offset is 5 and the amplitude is 10.

To pass the square wave to an output line, you can wire square wave out to an I/O resource using the FPGA I/O Node.

Over time, the Express VI returns the expected period length and frequency. However, some jitter might occur. For example, suppose you want to create a 6.25 MHz square wave using a 40 MHz top-level clock. In this case, a clock cycle is 25 ns and a square wave period is 160 ns, so the average square wave period should be 6.4 clock cycles long. Each square wave period is an integer number of cycles, but the Express VI returns period lengths of 6, 6, 6, 7, and 7. As a result, the average period length is 6.4 clock cycles, and the average frequency is 6.25 MHz.

If you place the Express VI outside a single-cycle Timed Loop and run the FPGA VI on a development computer, the timing is not precise. So, the Express VI returns a square wave that alternates between the high and low value.

Examples

Refer to the following VIs for examples of using the Square Wave Generator Express VI:

  • labview\examples\CompactRIO\FPGA Fundamentals\FPGA Math and Analysis\Generation\Square Wave\Square Wave.lvproj
  • labview\examples\R Series\FPGA Fundamentals\FPGA Math and Analysis\Generation\Square Wave\Square Wave.lvproj

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