Reset I/O Function

LabVIEW 2018 FPGA Module Help


Edition Date: March 2018
Part Number: 371599P-01
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Owning Palette: User-Controlled I/O Sampling Functions

Requires: FPGA Module

Resets the state, clears the data path, and clears any error conditions for the I/O items. This node also resets any pipeline stages and counters for the I/O item.

Details  

error in describes error conditions that occur before this node runs. This input provides standard error in functionality. If error in does not equal No Error, the value of error in passes to error out and this function does not execute.
FPGA I/O In is an optional input that allows you to specify the FPGA I/O item to read or write using an FPGA I/O control or constant. To use an FPGA I/O control as a connector pane input, the FPGA VI must be configured for reentrant execution.
error out contains error information. This output provides standard error out functionality.
FPGA I/O Out returns the FPGA I/O In.

Reset I/O Details

To select a method, first configure the node with an I/O item.

Not all targets support the User-Controlled I/O Sampling functions.

Single-Cycle Timed Loop Details

This node is supported inside and outside the single-cycle Timed Loop if the target supports it.

Error Handling Details

You can use the error terminals to place this node in the data flow of the VI as well as to ensure the data you receive is valid. FPGA targets might report errors differently. If error in indicates an error, this function executes normally and passes the value of error in to error out. Refer to the specific FPGA target hardware documentation for information about how specific FPGA targets report errors.

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