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Owning Palette: Timing VIs
Requires: FPGA Module
Waits the value you specify in Count between loop iterations. You can call this function in a loop to control the loop execution rate. If an execution instance is missed, such as when the logic in the loop takes longer to execute than the specified interval, the Loop Timer Express VI returns immediately and establishes a new reference time stamp for subsequent calls. To manage execution rates with the Loop Timer Express VI, place the Loop Timer Express VI in the first frame of a Flat Sequence structure or a Stacked Sequence structure and put the rest of the code in subsequent frames.
The Loop Timer Express VI differs from the Wait Until Next ms Multiple function, which wakes on a multiple of the wired in millisecond multiple.
During run time, you can use the Sample Rate To Loop Time VI to convert the clock rate and sample rate to the appropriate count for the Loop Timer Express VI.
|Dialog Box Options|
|Block Diagram Inputs|
|Block Diagram Outputs|
|Counter Units||Unit of time the VI uses for the counter. |
|Size of Internal Counter||Specifies the maximum time a timer can track. To save space on the FPGA, use the smallest Size of Internal Counter possible for the FPGA VI.|
|Count||Specifies the time between loop iterations.|
|Tick Count||Returns the value of a free running counter at the time the VI wakes up. A free running counter rolls over when the counter reaches the maximum of Size of Internal Counter specified in the configuration dialog box.|
The first time the Loop Timer Express VI executes in a loop, it records the current time. The next time the Loop Timer Express VI executes, it adds Count to the initial time and waits until Count has elapsed from the initial recorded time. The Loop Timer Express VI determines whether Count has elapsed only on whole integer value updates of its internal clock. Therefore, this function might increase loop execution time. To address this issue, set the Counter Units to Ticks. This change might help to reduce execution time by increasing the frequency of the internal clock updates.
The Loop Timer Express VI does not wait the first time you call it in an FPGA VI. If you place the Loop Timer Express VI in a loop so that it can execute immediately when the loop starts, all the code parallel with the Loop Timer Express VI in the loop executes twice before Count elapses after the initial time. To prevent the code from executing twice before Count elapses, use a Flat Sequence structure or a Stacked Sequence structure with the Loop Timer Express VI in the first frame and the rest of the code in subsequent frames to ensure that the code for the first and subsequent iterations is properly timed.
When called repeatedly using nested structures or continuous run mode, the Loop Timer Express VI timing does not reset each time. The Loop Timer Express VI continues to increment the time record it initiated upon the first call.
|Tip You also might consider using a single-cycle Timed Loop instead of using a loop with the Loop Timer Express VI.|