Avoiding Large VIs and Functions in FPGA VIs When Possible (FPGA Module)

LabVIEW 2018 FPGA Module Help


Edition Date: March 2018
Part Number: 371599P-01
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If you want to optimize an FPGA VI, be careful when using the following VIs and functions:

  • Quotient & Remainder—This function consumes significant space on the FPGA. If you need to divide by a power of two, consider using the Scale By Power Of 2 function with a negative constant wired to the n input.
  • Divide and Reciprocal—These functions can consume significant space on the FPGA. However, you can save space if you set the rounding mode as Truncate or Round-Half-Up (Asymmetric).
  • Square Root—This function provides a default sqrt(x) output that has a high precision. If the fractional word length of sqrt(x) is greater than half of that in x, you can decrease the fractional word length of sqrt(x) for a lower precision to save clock cycles and resources on the FPGA.
  • Rotate 1D Array—If you wire a control to the input, this function takes time proportional to the number of positions to be rotated, plus two clock cycles of overhead to enter and leave the function. However, if you wire a constant to the input, this function takes negligible time to execute and consumes no space on the FPGA.
  • Scale by Power of 2—If you wire a control to the input, this function can consume significant space on the FPGA. However, if you wire a constant to the input, the function consumes no space on the FPGA.
Note  You can optimize FPGA VIs by using constants instead of controls whenever possible. However, intermediary structures such as connector panes, loop tunnels, and shift registers can prevent LabVIEW from recognizing an input as a constant.

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