|LabVIEW 2016 FPGA Module Help|
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|LabVIEW 2018 FPGA Module Help|
|LabVIEW 2019 FPGA Module Help|
|LabVIEW 2020 FPGA Module Help|
Some LabVIEW FPGA Module applications contain shared resources that multiple objects, such as functions or subVIs, access in an FPGA VI. The following are possible shared resources:
Each shared resource contains one or more resource interfaces. A resource interface communicates between objects and shared resources, as shown in the following figure.
Resource contention occurs when you include two or more objects on the FPGA VI block diagram that simultaneously request access to the same shared resource through the same resource interface. In the previous figure, resource contention does not occur because the objects request access to the shared resource through two different resource interfaces.
However, in the following figure, the two Memory Method Nodes request access to the same shared resource (My Memory Item) through the same resource interface. If the two Memory Method Nodes request access to the shared resource at the same time, resource contention occurs.
To help you avoid resource contention, the FPGA Module offers arbitration options to determine which object can access the resource if multiple objects request access at the same time. The arbitration option you select determines if LabVIEW uses an arbiter. The arbitration options from which you can select vary by resource.
|Note Handshake items and the interrupt line do not support arbitration.|
Objects that request access to a resource through a resource interface are called requestors. A requestor becomes an accessor when the arbiter grants access to the resource, as shown in the following figure.
Most objects interact with a single resource interface. However, in some situations, some objects interact with multiple interfaces. For example, if you use the FPGA I/O Node for a bidirectional digital line, the FPGA I/O Node interacts with the output data and output enable interfaces on the corresponding resource, as shown in the following figure.
The previous figure approximately maps to a circuit as shown in the following schematic diagram.
In the previous figure, the circuit controls Output Enable and Output Data separately, so the LabVIEW FPGA Module represents Output Enable and Output Data as separate resource interfaces.
You can configure the arbitration options for each resource interface of FPGA I/O, FIFO, and memory items if you need to optimize the FPGA VI. If the FPGA VI design fits on the FPGA, meets the performance expectations, and compiles without errors, keep the default arbitration option. The default arbitration option for I/O depends on the FPGA target and the I/O resource. The default arbitration option for FIFOs and memory items is Arbitrate if Multiple Requestors Only. Other resources that include arbitration, such as controls and global variables, include fixed arbitration settings. You cannot change the arbitration option for such resources, so in some situations, you might need to modify the code on the block diagram to avoid resource contention.
|Note The arbitration process can take several clock cycles to execute. Arbitration takes additional time and FPGA space and can add jitter to an application. You can design the FPGA VI to avoid jitter.|