Interactive Front Panel Communication (FPGA Module)

LabVIEW 2018 FPGA Module Help


Edition Date: March 2018
Part Number: 371599P-01
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Use interactive front panel communication to communicate with an FPGA VI running on an FPGA target with no additional programming. With interactive front panel communication, the host computer displays the FPGA VI front panel window and the FPGA target executes the FPGA VI block diagram, as shown in the following illustration.

Note  Support of interactive front panel communication varies by FPGA target. Refer to the specific FPGA target hardware documentation for more information.

The LabVIEW front panel window communicates with the FPGA target block diagram through the controls and indicators. You can communicate with an FPGA target connected directly to host computer or connected to a remote system over the network. As the FPGA target block diagram continues to run, the host computer updates values on the FPGA VI front panel window as often as possible. The execution rate of the FPGA VI is not affected by communication with the host computer. However, the front panel data you share during interactive front panel communication is not deterministic.

Use interactive front panel communication between the FPGA target and the host computer to control and test VIs running on the FPGA target. After downloading and running the FPGA VI, keep LabVIEW open on the host computer to display and interact with the front panel window of the FPGA VI.

During interactive front panel communication, you cannot use LabVIEW debugging tools, including probes, execution highlighting, breakpoints, and single-stepping. To identify errors before you compile, download, and run the FPGA VI on the FPGA target, consider using a test bench.

Tip  You cannot use interactive front panel communication while the FPGA is configured to execute on a third-party simulator. You can either use a host VI to execute the FPGA VI or change the execution mode of the FPGA target by right-clicking the FPGA target in the Project Explorer window and selecting Select Execution Mode.

Related Information

FPGA Target Hardware Documentation

Debugging Techniques

Creating a Custom VI to Simulate I/O

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