![]() | LabVIEW 2016 FPGA Module Help |
![]() | LabVIEW 2017 FPGA Module Help |
![]() | LabVIEW 2018 FPGA Module Help |
![]() | LabVIEW 2019 FPGA Module Help |
![]() | LabVIEW 2020 FPGA Module Help |
FPGA targets can support more than one base clock, although some targets add only a subset of supported base clocks to the Project Explorer window when you add the target. If the FPGA target you use does not include the FPGA base clock you need in the Project Explorer window when you add the target to a LabVIEW project, you can add a new base clock to the LabVIEW project.
Complete the following steps to add a new base clock to a LabVIEW project.
You now can set the new base clock as the top-level clock in the project.
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