Requires: FPGA Module
In the Memory Properties dialog box, select Interfaces from the Category list to display this page.
Use this page to configure the arbitration options and to specify read and/or write ports for the memory item.
This page includes the following components:
|Caution When you use memory items implemented using block memory in multiple clock domains, it is possible to read and write from the same address simultaneously. Doing so can result in reading incorrect data.|