Guidelines for Maximizing System Performance

NI VeriStand 2018 Help

Edition Date: May 2018

Part Number: 372846M-01

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Use the following guidelines to optimize the performance of an NI VeriStand system.

Streamline the System Definition

Remove all unused hardware I/O channels.

Details

Unused hardware resources significantly slow performance. NI VeriStand must read and write every I/O channel in the system definition regardless of whether or not the system uses the channel data. Therefore, deploy a system definition that contains only the hardware channels you plan to use.

For DAQ devices that use multiplexed sampling, such as the M Series, E Series, and some X Series devices, change the rate of the Convert Clock to maximum.

Details

Multiplexing can cause delays if the Convert Clock does not run fast enough. Changing the rate of the Convert Clock to maximum minimizes the delay. Note that using the maximum possible Convert Clock rate also reduces the accuracy of measurements.

Related Information

DAQ Device Configuration Page

How is the Convert (Channel) Clock Rate Determined in NI-DAQmx and Traditional NI-DAQ?

Use hardware timing instead of software timing.

Details

With hardware timing, a digital signal, such as a clock on your device, controls the rate at which signals are generated. With software timing, the rate is determined by the software and operating system instead of by the measurement device. A hardware clock can run much faster than a software loop. A hardware clock is also more accurate than a software loop.

To ensure hardware timing is enabled, verify the settings in your system definition file match those listed in the following table.

Configuration Page Option Value
Chassis Chassis master hardware synchronization device DAQ or FPGA
Controller Primary Control Loop timing source Automatic

Related Information

Synchronizing Hardware and Software

Configure the BIOS Settings of the RT Controller

Enable Turbo Boost.

Details

Enabling the Turbo Boost setting in your BIOS enables or disables the Intel Turbo Boost feature for Intel Core™ processors. Enabling Turbo Boost allows active processor cores to run faster than the base operating frequency for short durations while other cores are idle.

Enabling Turbo Boost can also increase application jitter, so you should take care when enabling this setting on a Real-Time system.

Reduce the number of enabled cores.

Details

When Turbo Boost is activated, the maximum frequency of a specific processing core is dependent on the number of active cores. By manually reducing the number of cores, you ensure the active core or cores receive the maximum increase in clock frequency.

For example, the Intel Core i7-820QM quad-core processor that is used in the NI PXIe-8133 embedded controller has a base clock frequency of 1.73 GHz. If an application requires only one CPU core, the Turbo Boost feature automatically increases the clock frequency of the active CPU core on the Intel Core i7-820QM processor to 3.06 GHz.

Enable two cores for NI VeriStand systems with asynchronous components, such as an asynchronous custom device. Enabling two cores allows you to assign the asynchronous components to another CPU while still providing greater clock frequency to both active cores. If your NI VeriStand system does not contain asynchronous components, enable one core to provide the greatest frequency boost.

Related Information

CPU Performance Boost via Intel Turbo Boost Technology

Configure the Ethernet Settings of the Controller

In NI Measurement & Automation Explorer (MAX), change the Packet Detection setting of the controller to Line Interrupt if available. If not available, enable Polling and change the Polling Interval to 1 millisecond.

Details

Most NI Real-Time targets offer three options for packet detection: Line Interrupt, Polling, and Message Signal Interrupt. Line Interrupt provides the fastest performance as the device driver is immediately notified when the target receives data. Note that this option can also introduce the most jitter of the three.

For targets that offer only Interrupt and Polling, use polling at a high rate. Polling at a high rate provides high performance while introducing less jitter than interrupt. Note that high polling rates significantly increase CPU utilization.

Select Hardware for Performance

Use controllers that support hardware timing.

Details

Software timing slows the system significantly and adds to CPU usage. Therefore, using controllers that support hardware timing allows for better system performance.

If you use several XNET ports or channels only for bus monitoring, consider a USB CAN device instead.

Details

By using a USB CAN device on the host computer rather than NI VeriStand, you reduce the number of channels in the NI VeriStand system. The fewer channels NI VeriStand must read, the better the performance.

Do not use NI Real-Time Hypervisor for systems that require high performance.

Details

While convenient, NI Real-Time Hypervisor usually comes with dramatic RT performance penalties. Switching to an RT-only PXI controller can up to double the performance.
Select PXIe devices and controllers if possible.

Details

PXIe devices generally contain newer technology and run at faster rates than other devices.
Choose DAQ devices that use simultaneous sampling if possible.

Details

Simultaneous sampling provides much better performance than multiplexed sampling.

Improve the Performance of Models

If your system contains many small models, consolidate them into one model.

Details

Several small models typically use more memory than one large model.

In LabVIEW models, preallocate arrays instead of using Build Array functions.

Details

Each Build Array function uses a shared resource. Therefore, model execution can be delayed because both models cannot use the shared resource simultaneously. Preallocating arrays avoids potential delays.

To preallocate an array, use a Case structure and the First Call? function. Then, replace the elements of the array at run time with the Replace Array Subset function.

Optimize the Use of Reflective Memory

Change the Dynamic Data Size of the Data Sharing Network to 0 if the system does not execute stimulus profiles or perform data logging that references channels across multiple targets.

Details

Dynamic Data Size specifies the number of channels in reflective memory to reserve for dynamically mapping channel data at run time. Reflective memory can negatively impact performance, so by reducing the number of channels to zero, you avoid decreases in performance.

Related Information

Data Sharing Network Configuration Page

To share data between NI VeriStand systems, create channel mappings between targets in the system definition file.

Details

Rather than using data channels to read and write data between targets in a system definition, create channel mappings between targets. When you configure channel mappings, NI VeriStand uses optimized reflective memory. It is also much easier to configure.

Note  To prevent reflective memory used by NI VeriStand from overlapping with any non-NI VeriStand traffic on the bus, limit the range of addresses the NI VeriStand systems can use. To do so, launch the System Configuration Mappings dialog box, and select Reflective Memory Network from the Network menu. Then you can limit the range using the Reflective Memory Network configuration page.

Related Information

Mapping Channels

Reflective Memory Network Configuration Page

To send data from an NI VeriStand system to a non-NI VeriStand systems, manually select which channels to add to reflective memory, and then read those channels from the non-NI VeriStand system.

Details

For each target, you can select which channels to add to reflective memory by using the Export Channels button located on the Reflective Memory configuration page for the target. NI VeriStand adds the channels you select to the direct memory access (DMA) block write for the target, which reduces CPU usage.

After selecting the channels to export, you must configure the non-NI VeriStand systems to read the memory addresses of the exported channels. To locate the memory addresses, enable Export memory table to file on the Reflective Memory Network Configuration page for each target. This option creates a text file that contains the memory addresses when you deploy the system definition file.

Related Information

Reflective Memory Network Configuration Page

When an NI VeriStand system must read data from a non-NI VeriStand system, add data channels to only the targets that require the data.

Details

Data channels allow you to specify which reflective memory addresses an NI VeriStand target reads. However, you should add only data channels you intend to use. NI VeriStand reads the memory addresses one at a time, so the more addresses NI VeriStand must read, the slower the performance.

Related Information

Reflective Memory Data Channel Configuration Page

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