NI VeriStand 2018 Help

Edition Date: May 2018

Part Number: 372846M-01

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Symbol for the kiloohm, an SI unit of electrical resistance equal to 1000 ohms.


AI analog input
alarm A notification that the value of a particular channel has gone outside a specified range of values. An alarm triggers the execution of a specified procedure.
alias An alternate name for a channel in a system definition file.
AO analog output
API application programming interface—A set of functions you use to control a specific service, such as the VeriStand Engine or the Workspace window.


bit One binary digit, either 0 or 1.
bitfile A LabVIEW-generated file that defines the available I/O on the FPGA. A bitfile is a compiled version of an FPGA VI.
block diagram A pictorial description or representation of a program or algorithm. In LabVIEW, the block diagram that consists of executable icons called nodes and wires that carry data between the nodes. The block diagram is the source code for the VI. The block diagram resides in the block diagram window of the VI.
byte Eight related bits.


calculated channel A channel that produces a new value based on calculations performed on other channels in the system.
calibration The process of determining the accuracy of an instrument. In a formal sense, calibration establishes the relationship of an instrument's measurement to the value provided by a standard. When that relationship is known, the instrument may then be adjusted (calibrated) for best accuracy.
CAN controller area network—A serial bus finding increasing use as a device-level network for industrial automation. CAN was developed by Bosch to address the needs of in-vehicle automotive communications.
chassis master hardware synchronization device A hardware device that controls the synchronization of all hardware in a PXI chassis or across multiple PXI chassis. The chassis master hardware synchronization device must be an NI-DAQ device with at least one analog input or output channel, any NI FPGA, or a timing and sync device that has the capability to drive the RTSI 0 line.
compiled model A model in compiled form.
custom device A virtual instrument that executes user-defined actions, such as third-party hardware control.


DI digital input
differential measurement system A way to configure a device to read signals, in which you do not need to connect either input to a fixed reference, such as the earth ground or a building ground.
DIO digital input/output
DLL See compiled model.
DMA direct memory access—A method by which data can be transferred to/from computer memory from/to a device or memory on the bus while the processor does something else. DMA is the fastest method of transferring data to/from computer memory.
DO digital output
driver Software that controls a specific hardware device.


FIBEX FIeld Bus EXchange—A vendor-independent exchange format for embedded network data. It is an XML-based text format. For NI-XNET, NI adopted the ASAM FIBEX standard as a database storage format.
FIFO first-in-first-out memory buffer—The first data stored is the first data sent to the acceptor.
FIFO sink The output of a FIFO. You can use the NI VeriStand Custom Device APIs to set the buffer size at the source and sink of the FIFOs that an asynchronous custom device uses to share data with the RT engine.
FIFO source The input of a FIFO. You can use the NI VeriStand Custom Device APIs to set the buffer size at the source and sink of the FIFOs that an asynchronous custom device uses to share data with the RT engine.
FlexRay A new, deterministic, fault-tolerant, and high-speed bus system developed in conjunction with automobile manufacturers and leading suppliers.
FPGA field-programmable gate array—Fundamentally, an FPGA is a semi-conductor device that contains a large quantity of gates (logic devices), which are not interconnected, and whose function is determined by a wiring list, which is downloaded to the FPGA. The wiring list determines how the gates are interconnected, and this interconnection is performed dynamically by turning semiconductor switches on or off to enable the different connections.
FPGA configuration file An XML-based file that specifies the content of DMA FIFOs.
FPGA VI A configuration that is downloaded to the FPGA and that determines the functionality of the hardware.
frames Messages sent across an embedded network. Frames are sorted into clusters within an NI-XNET database.
frequency f, the basic unit of rate, measured in events or oscillations per second using a frequency counter or spectrum analyzer. Frequency is the reciprocal of the period of a signal.


HIL hardware-in-the-loop—A simulation configuration in which you test a controller implementation with a simulated system. See RCP.
host computer The computer that runs the VeriStand Gateway and hosts the screen file.
Hz Hertz—Cycles per second of a periodic signal. The unit of measure for frequency.


I/O input/output—The transfer of data to/from a computer system involving communications channels, operator interface devices, and/or data acquisition and control interfaces.
interface The interface represents a single CAN, FlexRay, or LIN connector on an NI hardware device. Within NI-XNET, the interface is the software object used to communicate with external hardware described in the database.


Symbol for the kiloohm, an SI unit of electrical resistance equal to 1000 ohms.


LabVIEW Laboratory Virtual Instrument Engineering Workbench—A graphical programming language.
LIN local interconnect network—A standard for low-cost, low-end multiplexed communication in automotive networks. LIN provides cost-efficient communication in applications where the bandwidth and versatility of CAN are not required.


mapping A connection between two channels.
Measurement & Automation Explorer (MAX) Provides a centralized location for configuration of National Instruments hardware products. MAX also provides many useful tools for interaction with hardware.
MIO multifunction I/O—DAQ module. Designates a family of data acquisition products that have multiple analog input channels, digital I/O channels, timing, and optionally, analog output channels. An MIO product can be considered a miniature mixed signal tester, due to its broad range of signal types and flexibility. Also known as multifunction DAQ.
model A mathematical representation of a real-world system that responds to stimuli by producing outputs in a way that emulates the behavior of the modeled item.


NI National Instruments
NI TestStand National Instruments test executive for sequencing and managing automatic test programs.
NI VeriStand LabVIEW Model Generator A tool that generates a compiled model from a LabVIEW VI or simulation subsystem. This tool is accessible from the Tools menu in LabVIEW 2010 or later and generates files of the type .lvmodel or .lvmodelso.
Note  You must install additional software to enable LabVIEW models for targets running a Linux Real-Time OS. For more information about how to use LabVIEW models with Linux, visit the NI website.

NRSE nonreferenced single-ended mode—All measurements are made with respect to a common (NRSE) measurement system reference, but the voltage at this reference can vary with respect to the measurement system ground.


offline A simulation configuration in which you use software to simulate the controller and the system you want to control. No hardware is involved in an offline simulation.


PC personal computer
PCI peripheral component interconnect—An industry-standard, high-speed databus.
Phar Lap ETS A real-time operating system designed optimized for devices based on the Intel x86 architecture.
port In regard to NI-XNET, port refers to the connector on an NI hardware device. The physical connector includes the transceiver cable if applicable.
port width Refers to the number of lines in a port. For example, E Series devices have one port with eight lines; therefore, the port width is eight.
procedure A set of actions that the VeriStand Engine executes.
project file The .nivsproj file that defines high-level settings in an NI VeriStand project, such as the screen and system definition files to run, the IP address of the VeriStand Gateway, etc.
PWM pulse-width modulation


quadrature encoder An encoding technique for a rotating device where two tracks of information are placed on the device, with the signals on the tracks offset by 90º from each other. This makes it possible to detect the direction of the motion.


RAM random-access memory—The generic term for the read/write memory that is used in computers. RAM allows bits and bytes to be written to it as well as read from.
RCP rapid control prototype—A simulation configuration in which you test plant hardware with a software model of the controller. See HIL.
real-time (RT) Pertaining to the performance of a computation during the actual time that the related physical process transpires so results of the computation can be used in guiding the physical process.
real-time sequence A program that can deploy to a target with a system definition file and read/write channels defined in the system definition file. Real-time sequences can feature a wide array of programming constructs, including while loops, for loops, variables, and conditional statements. Real-time sequences execute on the target. See stimulus profile.
reflective memory network A means of sharing data between two independent systems in a deterministic manner. Reflective memory devices are connected together using fiber optic cables. This reflective memory system forms a deterministic network that operates like a dual-ported memory system.
RSE referenced single-ended configuration—All measurements are made with respect to a common reference measurement system or ground. Also called a grounded measurement system.
RT See real-time.
RTSI real-time system integration bus—The National Instruments timing bus that interconnects data acquisition devices directly by means of connectors on top of the devices for precise synchronization of functions.


screen file A .nivscreen or .nivsscr file that defines the configuration and settings for the screens and display items you view in either the Workspace or UI Manager window, respectively.
SCXI Signal Conditioning eXtensions for Instrumentation—The National Instruments product line for conditioning low-level signals within an external chassis near sensors so that only high-level signals are sent to DAQ devices in the noisy PC environment.
service A LabVIEW VI that runs on the host computer when NI VeriStand connects to a target. Services are typically Workspace tools that you want to launch as soon as you connect to a target, or that you want to synchronize with the launch of the Workspace window.
single-point Data acquisition in which the software reads a single point of data from one or more analog input channels and immediately returns the value.
sink See FIFO sink.
stimulus profile A test executive that can call real-time sequences, open and close NI VeriStand projects, and perform data-logging and pass/fail analysis. It also connects real-time sequences to system definition files to bind channel data within the system definition file to variables in the real-time sequence. Stimulus profiles execute on the host computer. See Stimulus Profile Editor.
Stimulus Profile Editor A development environment you use to create, modify, and execute tests. See stimulus profile.
system channel A channel that monitors the state and condition of various internal aspects of the NI VeriStand system.
system definition file A .nivssdf file you configure primarily in the System Explorer window. A system definition file contains the configuration settings of the VeriStand Engine.


target The desktop PC or real-time (RT) target on which you run the system definition file and VeriStand Engine.
TCP/IP Transmission Control Protocol/Internet Protocol—A standard format for transmitting data in packets from one computer to another. The two parts of TCP/IP are TCP, which deals with the construction of data packets, and IP, which routes them from computer to computer.
TestStand See NI TestStand.
timing and sync device A virtual instrument that synchronizes more than one chassis.


user channel A channel that stores a single value.


VeriStand Engine The non-visible execution mechanism that controls the timing of the entire system as well as the communication between the target and the host computer.
VeriStand Gateway The non-visible mechanism that creates a TCP/IP communication channel which facilitates communication with the VeriStand Engine over the network. The VeriStand Gateway receives channel values from the VeriStand Engine and stores these values in a table that can be viewed using the Channel Data Viewer, available in the Tools menu of the Workspace window.
VI virtual instrument—A LabVIEW program.
vxworks VxWorks is a real-time operating system (RTOS) developed as proprietary software by Wind River of Alameda, California, US. VxWorks is designed for distributed computing on most central processing units (CPU) with embedded systems.


XNET NI-XNET—A suite of products that provide connectivity to Controller Area Network (CAN), Local Interconnect Network (LIN), and FlexRay networks.
XNET database A standardized file, such as CANdb (.dbc) or NI-CAN (.ncd) for CAN or FIBEX (.xml) for FlexRay that NI-XNET applications use to understand hardware communications in the embedded system. The database contains many object classes, each of which describes a distinct entity in the embedded system.


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