Configuring the Master Timebase Source for a Module (FPGA Interface)

NI CompactRIO Device Drivers Help

Edition Date: December 2017

Part Number: 373197L-01

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The information in this topic applies to the following modules:

In a system that contains more than one of these modules, you can configure one module as the master timebase source (master) and configure the other modules to use that master timebase source (slaves). Sharing the same master timebase source allows you to synchronize multiple modules. The master timebase source is divided to acquire data at the data rate you configure.

Note Note  The NI 9151 R Series Expansion chassis does not support synchronizing multiple modules.
Note Note  The NI 9770 does not support synchronization with other non-NI 9770 modules.
Note Note  You can only use another NI 9775 or the NI 9469 as the master timebase source for the NI 9775. If you select the NI 9469, you can only use the 12.8 MHz clock as the exported clock frequency.

Configuring the Onboard Clock of a Module as the Master Timebase Source

Complete the following steps to configure the internal Onboard Clock of one module as the master timebase source.

  1. Configure the CompactRIO system, and add a module.
  2. Right-click the module in the Project Explorer window and select Properties to launch the C Series Module Properties dialog box.
  3. Select <Onboard Clock> from the Master Timebase Source pull-down menu.
  4. Click the OK button.
  5. Select File»Save All in the Project Explorer window.

Configuring a Master Module to Share the Master Timebase Source with Slaves

Complete the following steps to configure the master timebase source for a master module and share that timebase with slave modules.

  1. Configure the CompactRIO system, and add the module you want to use as the master.
  2. Right-click the module in the Project Explorer window and select Properties to launch the C Series Module Properties dialog box.
  3. Select <Onboard Clock> from the Master Timebase Source pull-down menu.
  4. Place a checkmark in the Export Onboard Clock checkbox.
  5. Add a module you want to use as a slave.
  6. Right-click the slave module in the Project Explorer window and select Properties to display the C Series Module Properties dialog box.
  7. Select the name of the master module from the Master Timebase Source pull-down menu.
  8. Repeat steps 5 through 7 for each slave module you want to configure.
  9. Click the OK button.
  10. Select File»Save All in the Project Explorer window.

Related Topics

Synchronizing Multiple Modules (FPGA Interface)

Understanding the Maximum Sample Rate when Synchronizing Multiple Modules (FPGA Interface)

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