Understanding the Maximum Sample Rate when Synchronizing Multiple Modules (FPGA Interface)

NI CompactRIO Device Drivers Help

Edition Date: December 2017

Part Number: 373197L-01

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The modules listed below derive their sampling rate from the internal master timebase.

Select a module to show more information about the internal master timebase and maximum sample rate for each module.

Show information for:


Internal master timebase value
Maximum sample rate  
      when module uses internal master timebase1 value
      when module is a slave2 to
1  The maximum sample rate for a module using the internal master timebase and is not sourcing the timebase to different model types.
2  When synchronizing multiple modules, the maximum sample rate of a slave module depends on the frequency of the master module internal master timebase. The maximum sample rate of the system is the lowest sample rate of all the modules being synchronized.

Related Topics

Configuring the Master Timebase Source for a Module (FPGA Interface)

Synchronizing Multiple Modules (FPGA Interface)


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