NI 9146

NI CompactRIO Device Drivers Help

Edition Date: December 2017

Part Number: 373197L-01

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Ethernet 4-Slot, 2M Gate FPGA Expansion I/O Chassis

NI 9146 Front Panel

1  LEDs   3  Power Connector  
2  RJ-45 Ethernet Port   4  DIP Switches  

Writing to DMA FIFOs on the NI 9146

Keep in mind the following guidelines for writing to DMA FIFOs on the NI 9146:

  • Always check the Empty Elements Remaining indicator from any previous DMA write operation before doing the next DMA FIFO write.
  • The DMA engine transfers data in 64-byte chunks. If the host FIFO is full, reading data in amounts that are non-multiples of 64 bytes from either the FPGA FIFO or the host FIFO does not necessarily free an equivalent amount of space on the other FIFO.

Refer to the Best Practices for Using DMA FIFOs (FPGA Module) topic for more information about DMA FIFOs.

Hardware Documentation (?)

 NI 9146 hardware documentation on ni.com/manuals

Related Topics

Configuring a Project with Connected Hardware
Configuring a Project with Offline Hardware
Configuring the Chassis I/O (FPGA Interface)
Converting the Temperature of a CompactRIO Chassis, Ethernet RIO Chassis, MXIe-RIO Chassis, or a Single-Board RIO Device (FPGA Interface)

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