Configuring the Host Memory Buffer

NI CompactRIO Device Drivers Help

Edition Date: December 2017

Part Number: 373197L-01

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Some FPGA targets contain a host memory buffer that you can access directly from the FPGA VI. Use the memory item interface in the project to use the host memory buffer in the same way you use block memory and LUT. Host memory buffer items appear in the Project Explorer window under the FPGA target.

Most FPGA applications using the host memory buffer can take advantage of the usability and VHDL optimization that the FPGA memory item interface provides. You cannot use VI-defined memory items to configure the host memory buffer.

Determining Whether Host Memory Buffer is Available

Complete the following steps to determine whether host memory buffer is available for your target.

  1. Display the Project Explorer window.
  2. Right-click the FPGA target and select Memory Properties.
  3. Open the Implementation drop-down list and select DRAM.
  4. Open the DRAM bank drop-down list. If host memory buffer is available, it will be included in the list.

Partitioning the Physical Host Memory Buffer into Multiple Memory Items

You can use the FPGA memory item interface to partition the physical host memory buffer banks available on a target into multiple memory items. Use the Memory Properties dialog box to create and configure memory partitions on a host memory buffer bank. For example, if a target has two physical host memory buffer banks, you could partition one bank into three different memories and the other bank into five memories, as shown below. LabVIEW treats each memory independently of each other.

Understanding Latency and Host Memory Buffer

Access to the host memory buffer involves some non-deterministic latency. To compensate for this latency, use the Request Data and Retrieve Data methods to read data from the host memory buffer. You can queue multiple requests for data using the Request Data method and retrieve requested data using the Retrieve Data method. The host memory buffer returns requested data when you indicate you are ready to receive it using handshaking signals.

Data Recommendations

If you use a data type that is smaller than the access size, the remaining bits receive an unknown and invalid value, but still get written and take up both space and bandwidth. For example, if the access size is 64 bits wide and you choose a 32-bit data type when configuring the host memory buffer, the remaining 32 bits are of an unknown and invalid data type. The following figure shows an optimized memory element and a memory element in which the data type is smaller than the access size.

NI recommends using data types that are exactly the same width as the access size of the host memory buffer to ensure that each access is optimized. Memory items accept clusters to be used as data types, and information can be packaged into clusters to achieve data types larger than those native to LabVIEW.

NI recommends that you push data into the memory item interface within the 40 MHz onboard clock domain. Right-click the FPGA target in a LabVIEW project, select New»Memory. Bandwidth is maximized when data is pushed into the memory item interface at the clock rate.

Request Pipelining

The host memory buffer architecture is highly pipelined, resulting in relatively long latency between data requests and the execution of the requests. NI recommends that prerequest samples, which helps maintain high throughput. To prerequest samples, request the samples you want to read without waiting for the data valid strobe of the retrieve method.

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