Testing Multiple Sites in Parallel (TSM)

NI TestStand 2017 Semiconductor Module Help

Edition Date: July 2018

Part Number: 373892H-01

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A semiconductor test program might need to test multiple DUTs at the same time in parallel to improve tester efficiency. A semiconductor test program can test one DUT at a time on a single test site or test multiple DUTs at a time on multiple test sites.

To implement multisite testing in a test program, the test engineer must consider the following requirements:

  • The test program must be able to evaluate limits on multiple DUTs.
  • The test program might execute individual test sites differently depending on previous test results specific to the individual test sites. For example, different sites might become disabled before a test begins depending on whether a handler can actually place DUTs in those sites, or different sites might become disabled during a test.
  • The test program must be able to test DUTs on multiple sites simultaneously, even when multiple sites must simultaneously communicate with the same instrument.

TSM Implementation

The TestStand Batch and Parallel process models support multisite testing by creating a test socket for running a copy of the TestStand sequence in a new execution thread. However, the default TestStand behavior does not account for difficulties that a test engineer might encounter when programming for hardware shared among multiple test sites, such as NI-HSDIO instruments.

Use the TSM Code Module API to translate DUT pin names to instrument channels and sessions for the active sites and to publish test results to the active sites. The Semiconductor Multi Test step or the Semiconductor Action step creates the object reference SemiconductorModuleContext that you pass to a LabVIEW or .NET code module to use the Code Module API. The SemiconductorModuleContext object describes a subset of pins, sites, and instruments on a test system.

When you execute tests using the Batch process model, use the Multisite Option control on the Options tab of the Semiconductor Multi Test or the Semiconductor Action step to configure the following multisite execution options for the test:

  • One thread per subsystem—Execute tests for each subsystem in a separate thread. A subsystem is a set of sites and system resources on the tester that operate independently of other sites and resources, typically because the sites share the same instrument, which requires the test program to test the sites together in a single thread. The Semiconductor Multi Test step or the Semiconductor Action step identifies subsystems by using the pin map and the pins shown in the SemiconductorModuleContext Pins control.
  • One thread only—Execute tests for all sites in a single thread.
  • One thread per site—Execute tests for each site in a separate thread. Use this option only when the code module does not use hardware shared among multiple sites.

The multisite option you select determines how many copies of a code module to execute. The more code modules that execute, the fewer sites TSM tests in any one code module.

Note Note   In TestStand 2016 and earlier, you can use the LabVIEW Adapter Configuration dialog box to set the number of LabVIEW execution threads to a maximum value of 2 x the number of logical processors. If you need more threads than that for all VIs running in parallel, configure the VIs to use an execution system other than the same as caller execution system on the Execution page of the VI Properties dialog box in LabVIEW and configure the number of execution threads assigned to a LabVIEW execution system.

Multisite Programming Techniques

When you create test programs to run on multiple sites, you must account for certain subsystem considerations, such as instrumentation resources, the relationship between the subsystem and the pin map, and using switches to share a channel between the same DUT pin on multiple sites. Consider the following issues during code module development:

Note Note  The Semiconductor Multi Test step type is not designed to execute in loop blocks that the TestStand For step and For Each step create. Using multiple Semiconductor Multi Test steps in a loop can result in incorrect step results in certain multisite situations. To avoid incorrect behavior of Semiconductor Multi Test steps in a loop, the last step in the loop block must be a Semiconductor Multi Test step with the Multisite Option set to One thread only.

See Also

Multisite Scenarios Example

TSM Example Programs

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